Copper interconnect structure with amorphous tantalum iridium diffusion barrier

A method of forming a diffusion barrier for use in semiconductor device manufacturing includes depositing, by a physical vapor deposition (PVD) process, an iridium doped, tantalum based barrier layer over a patterned interlevel dielectric (ILD) layer, wherein the barrier layer is deposited with an i...

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Hauptverfasser: DeHaven, Patrick W, Edelstein, Daniel C, Flaitz, Philip L, Nogami, Takeshi, Rossnagel, Stephen M, Yang, Chih-Chao
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creator DeHaven, Patrick W
Edelstein, Daniel C
Flaitz, Philip L
Nogami, Takeshi
Rossnagel, Stephen M
Yang, Chih-Chao
description A method of forming a diffusion barrier for use in semiconductor device manufacturing includes depositing, by a physical vapor deposition (PVD) process, an iridium doped, tantalum based barrier layer over a patterned interlevel dielectric (ILD) layer, wherein the barrier layer is deposited with an iridium concentration of at least 60 atomic % such that the barrier layer has a resulting amorphous structure.
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fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_07951708</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>07951708</sourcerecordid><originalsourceid>FETCH-uspatents_grants_079517083</originalsourceid><addsrcrecordid>eNqNyrEKwkAMANBbHET9h_yAUBGpzqXi5uIu8ZqzgTZ3JDn8fRX8AKe3vGW4drkUUmBx0phFKDqYa41eleDFPgLOWcuYq4GjOE51BlYe-OPAKVXjLPBAVSZdh0XCyWjzcxXg3N-6y7ZaQSdxuz8VvzTt6bBrm-P-j_IGwRg5NQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Copper interconnect structure with amorphous tantalum iridium diffusion barrier</title><source>USPTO Issued Patents</source><creator>DeHaven, Patrick W ; Edelstein, Daniel C ; Flaitz, Philip L ; Nogami, Takeshi ; Rossnagel, Stephen M ; Yang, Chih-Chao</creator><creatorcontrib>DeHaven, Patrick W ; Edelstein, Daniel C ; Flaitz, Philip L ; Nogami, Takeshi ; Rossnagel, Stephen M ; Yang, Chih-Chao ; International Business Machines Corporation</creatorcontrib><description>A method of forming a diffusion barrier for use in semiconductor device manufacturing includes depositing, by a physical vapor deposition (PVD) process, an iridium doped, tantalum based barrier layer over a patterned interlevel dielectric (ILD) layer, wherein the barrier layer is deposited with an iridium concentration of at least 60 atomic % such that the barrier layer has a resulting amorphous structure.</description><language>eng</language><creationdate>2011</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7951708$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,780,802,885,64039</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7951708$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>DeHaven, Patrick W</creatorcontrib><creatorcontrib>Edelstein, Daniel C</creatorcontrib><creatorcontrib>Flaitz, Philip L</creatorcontrib><creatorcontrib>Nogami, Takeshi</creatorcontrib><creatorcontrib>Rossnagel, Stephen M</creatorcontrib><creatorcontrib>Yang, Chih-Chao</creatorcontrib><creatorcontrib>International Business Machines Corporation</creatorcontrib><title>Copper interconnect structure with amorphous tantalum iridium diffusion barrier</title><description>A method of forming a diffusion barrier for use in semiconductor device manufacturing includes depositing, by a physical vapor deposition (PVD) process, an iridium doped, tantalum based barrier layer over a patterned interlevel dielectric (ILD) layer, wherein the barrier layer is deposited with an iridium concentration of at least 60 atomic % such that the barrier layer has a resulting amorphous structure.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2011</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNqNyrEKwkAMANBbHET9h_yAUBGpzqXi5uIu8ZqzgTZ3JDn8fRX8AKe3vGW4drkUUmBx0phFKDqYa41eleDFPgLOWcuYq4GjOE51BlYe-OPAKVXjLPBAVSZdh0XCyWjzcxXg3N-6y7ZaQSdxuz8VvzTt6bBrm-P-j_IGwRg5NQ</recordid><startdate>20110531</startdate><enddate>20110531</enddate><creator>DeHaven, Patrick W</creator><creator>Edelstein, Daniel C</creator><creator>Flaitz, Philip L</creator><creator>Nogami, Takeshi</creator><creator>Rossnagel, Stephen M</creator><creator>Yang, Chih-Chao</creator><scope>EFH</scope></search><sort><creationdate>20110531</creationdate><title>Copper interconnect structure with amorphous tantalum iridium diffusion barrier</title><author>DeHaven, Patrick W ; Edelstein, Daniel C ; Flaitz, Philip L ; Nogami, Takeshi ; Rossnagel, Stephen M ; Yang, Chih-Chao</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_079517083</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2011</creationdate><toplevel>online_resources</toplevel><creatorcontrib>DeHaven, Patrick W</creatorcontrib><creatorcontrib>Edelstein, Daniel C</creatorcontrib><creatorcontrib>Flaitz, Philip L</creatorcontrib><creatorcontrib>Nogami, Takeshi</creatorcontrib><creatorcontrib>Rossnagel, Stephen M</creatorcontrib><creatorcontrib>Yang, Chih-Chao</creatorcontrib><creatorcontrib>International Business Machines Corporation</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>DeHaven, Patrick W</au><au>Edelstein, Daniel C</au><au>Flaitz, Philip L</au><au>Nogami, Takeshi</au><au>Rossnagel, Stephen M</au><au>Yang, Chih-Chao</au><aucorp>International Business Machines Corporation</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Copper interconnect structure with amorphous tantalum iridium diffusion barrier</title><date>2011-05-31</date><risdate>2011</risdate><abstract>A method of forming a diffusion barrier for use in semiconductor device manufacturing includes depositing, by a physical vapor deposition (PVD) process, an iridium doped, tantalum based barrier layer over a patterned interlevel dielectric (ILD) layer, wherein the barrier layer is deposited with an iridium concentration of at least 60 atomic % such that the barrier layer has a resulting amorphous structure.</abstract><oa>free_for_read</oa></addata></record>
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title Copper interconnect structure with amorphous tantalum iridium diffusion barrier
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-23T08%3A47%3A54IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=DeHaven,%20Patrick%20W&rft.aucorp=International%20Business%20Machines%20Corporation&rft.date=2011-05-31&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E07951708%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true