Scalable architecture for subspace signal tracking

Scalable architecture for subspace signal tracking

A real-time implementation of a subspace tracker is disclosed. Efficient architecture addresses the unique computational elements of the Fast Approximate Subspace Tracking (FAST) algorithm. Each of these computational elements can scale with the rank and size of the subspace. One embodiment of archi...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Smith, John M, Kotrlik, Michael J, Real, Edward C
Format: Patent
Sprache:eng
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Smith, John M
Kotrlik, Michael J
Real, Edward C
description A real-time implementation of a subspace tracker is disclosed. Efficient architecture addresses the unique computational elements of the Fast Approximate Subspace Tracking (FAST) algorithm. Each of these computational elements can scale with the rank and size of the subspace. One embodiment of architecture described is implemented in digital hardware that performs variable rank subspace tracking using the FAST algorithm. In particular, the FAST algorithm is effectively implemented by a few processing elements, coupled with an efficient Singular Vector Decomposition (SVD), and the realization/availability of high density programmable logic devices. The architecture enables the ability to track the possibly changing dimension of the signal subspace.
format Patent
fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_07945061</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>07945061</sourcerecordid><originalsourceid>FETCH-uspatents_grants_079450613</originalsourceid><addsrcrecordid>eNrjZDAKTk7MSUzKSVVILErOyCxJTS4pLUpVSMsvUiguTSouSExOVSjOTM9LzFEoKUpMzs7MS-dhYE1LzClO5YXS3AwKbq4hzh66pUDlJal5JcXx6UWJIMrA3NLE1MDM0JgIJQC1gi0v</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Scalable architecture for subspace signal tracking</title><source>USPTO Issued Patents</source><creator>Smith, John M ; Kotrlik, Michael J ; Real, Edward C</creator><creatorcontrib>Smith, John M ; Kotrlik, Michael J ; Real, Edward C ; BAE Systems Information and Electronic Systems Integration Inc</creatorcontrib><description>A real-time implementation of a subspace tracker is disclosed. Efficient architecture addresses the unique computational elements of the Fast Approximate Subspace Tracking (FAST) algorithm. Each of these computational elements can scale with the rank and size of the subspace. One embodiment of architecture described is implemented in digital hardware that performs variable rank subspace tracking using the FAST algorithm. In particular, the FAST algorithm is effectively implemented by a few processing elements, coupled with an efficient Singular Vector Decomposition (SVD), and the realization/availability of high density programmable logic devices. The architecture enables the ability to track the possibly changing dimension of the signal subspace.</description><language>eng</language><creationdate>2011</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7945061$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,780,802,885,64039</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7945061$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Smith, John M</creatorcontrib><creatorcontrib>Kotrlik, Michael J</creatorcontrib><creatorcontrib>Real, Edward C</creatorcontrib><creatorcontrib>BAE Systems Information and Electronic Systems Integration Inc</creatorcontrib><title>Scalable architecture for subspace signal tracking</title><description>A real-time implementation of a subspace tracker is disclosed. Efficient architecture addresses the unique computational elements of the Fast Approximate Subspace Tracking (FAST) algorithm. Each of these computational elements can scale with the rank and size of the subspace. One embodiment of architecture described is implemented in digital hardware that performs variable rank subspace tracking using the FAST algorithm. In particular, the FAST algorithm is effectively implemented by a few processing elements, coupled with an efficient Singular Vector Decomposition (SVD), and the realization/availability of high density programmable logic devices. The architecture enables the ability to track the possibly changing dimension of the signal subspace.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2011</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZDAKTk7MSUzKSVVILErOyCxJTS4pLUpVSMsvUiguTSouSExOVSjOTM9LzFEoKUpMzs7MS-dhYE1LzClO5YXS3AwKbq4hzh66pUDlJal5JcXx6UWJIMrA3NLE1MDM0JgIJQC1gi0v</recordid><startdate>20110517</startdate><enddate>20110517</enddate><creator>Smith, John M</creator><creator>Kotrlik, Michael J</creator><creator>Real, Edward C</creator><scope>EFH</scope></search><sort><creationdate>20110517</creationdate><title>Scalable architecture for subspace signal tracking</title><author>Smith, John M ; Kotrlik, Michael J ; Real, Edward C</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_079450613</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2011</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Smith, John M</creatorcontrib><creatorcontrib>Kotrlik, Michael J</creatorcontrib><creatorcontrib>Real, Edward C</creatorcontrib><creatorcontrib>BAE Systems Information and Electronic Systems Integration Inc</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Smith, John M</au><au>Kotrlik, Michael J</au><au>Real, Edward C</au><aucorp>BAE Systems Information and Electronic Systems Integration Inc</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Scalable architecture for subspace signal tracking</title><date>2011-05-17</date><risdate>2011</risdate><abstract>A real-time implementation of a subspace tracker is disclosed. Efficient architecture addresses the unique computational elements of the Fast Approximate Subspace Tracking (FAST) algorithm. Each of these computational elements can scale with the rank and size of the subspace. One embodiment of architecture described is implemented in digital hardware that performs variable rank subspace tracking using the FAST algorithm. In particular, the FAST algorithm is effectively implemented by a few processing elements, coupled with an efficient Singular Vector Decomposition (SVD), and the realization/availability of high density programmable logic devices. The architecture enables the ability to track the possibly changing dimension of the signal subspace.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_uspatents_grants_07945061
source USPTO Issued Patents
title Scalable architecture for subspace signal tracking
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-02T09%3A33%3A04IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Smith,%20John%20M&rft.aucorp=BAE%20Systems%20Information%20and%20Electronic%20Systems%20Integration%20Inc&rft.date=2011-05-17&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E07945061%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true