Method of improving noise characteristics of an ADPLL and a relative ADPLL

Method of improving noise characteristics of an ADPLL and a relative ADPLL

An all-digital phase locked loop (ADPLL) generates a feedback word representing a continuous-time oscillating signal. The ADPLL includes a time-to-digital converter (TDC) configured to be input with the continuous-time oscillating signal and a reference signal. The reference signal is a function of...

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Hauptverfasser: Weltin-Wu, Colin, Temporiti Milani, Enrico Stefano, Baldi, Daniele
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creator Weltin-Wu, Colin
Temporiti Milani, Enrico Stefano
Baldi, Daniele
description An all-digital phase locked loop (ADPLL) generates a feedback word representing a continuous-time oscillating signal. The ADPLL includes a time-to-digital converter (TDC) configured to be input with the continuous-time oscillating signal and a reference signal. The reference signal is a function of a reference clock signal. The TDC is configured to generate a digital word, the feedback word being a function of the digital word. The ADPLL includes a delay circuit configured to be input with at least one of the reference clock signal and the continuous-time oscillating signal and to be controlled by a first dither signal.
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title Method of improving noise characteristics of an ADPLL and a relative ADPLL
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