Method of laying out integrated circuit design based on known polysilicon perimeter densities of individual cells

Disclosed is a method of laying out individual cells of an integrated circuit design, based at least in part on the known polysilicon perimeter densities of those cells. That is, the method embodiments use the knowledge of polysilicon perimeter density for known cells to drive placement of those cel...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Chadwick, Laura S, Culp, James A, Hathaway, David J, Polson, Anthony D
Format:	Patent
Sprache:	eng
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!