Enhancing performance of a memory unit of a data processing device by separating reading and fetching functionalities

The present invention relates to a data processing device comprising a processing unit and a memory unit, and to a method for controlling operation of a memory unit of a data processing device. The memory unit comprises a main memory, a low- level cache memory, which is directly connected to the pro...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Peters, Harm Johannes Antonius Maria, Sethuraman, Ramanathan, Veldman, Gerard, Meuwissen, Patrick Peter Elizabeth
Format: Patent
Sprache:eng
Online-Zugang:Volltext bestellen
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