Synthesizing current source driver model for analysis of cell characteristics

Synthesizing current source driver model for analysis of cell characteristics

A method for performing an analysis of at least one logic stage in a netlist, which include one or more drivers, is provided. The method includes operations of generating at least one look-up table for an output transient current to be based on values of input and output voltages using data availabl...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Chopra, Kaviraj S, Kashyap, Chandramouli V, Su, Haihua
Format: Patent
Sprache:eng
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Chopra, Kaviraj S
Kashyap, Chandramouli V
Su, Haihua
description A method for performing an analysis of at least one logic stage in a netlist, which include one or more drivers, is provided. The method includes operations of generating at least one look-up table for an output transient current to be based on values of input and output voltages using data available from a cell library; synthesizing analytically at least one current source model, which includes a DC component and a plurality of parasitic capacitances, using the look-up table; simulating the logic stage using the current source model to model the drivers; and obtaining characteristics of the simulated logic stage. A system and a machine-readable medium for performing the method are also provided.
format Patent
fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_07761275</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>07761275</sourcerecordid><originalsourceid>FETCH-uspatents_grants_077612753</originalsourceid><addsrcrecordid>eNqNzD0KAjEQQOE0FqLeYS4g-IPmAOKyjZX2MsxOdgeyicwkwnp6FTyA1dc83txdrlMqA5u8JPVAVZVTActViaFTebLCmDuOELICJoyTiUEOQBwj0ICKVFjFipAt3SxgNF79XDhozrdTu672wPI5271X_LLx_rjd-cP-j-QNA7035A</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Synthesizing current source driver model for analysis of cell characteristics</title><source>USPTO Issued Patents</source><creator>Chopra, Kaviraj S ; Kashyap, Chandramouli V ; Su, Haihua</creator><creatorcontrib>Chopra, Kaviraj S ; Kashyap, Chandramouli V ; Su, Haihua ; International Business Machines Corporation</creatorcontrib><description>A method for performing an analysis of at least one logic stage in a netlist, which include one or more drivers, is provided. The method includes operations of generating at least one look-up table for an output transient current to be based on values of input and output voltages using data available from a cell library; synthesizing analytically at least one current source model, which includes a DC component and a plurality of parasitic capacitances, using the look-up table; simulating the logic stage using the current source model to model the drivers; and obtaining characteristics of the simulated logic stage. A system and a machine-readable medium for performing the method are also provided.</description><language>eng</language><creationdate>2010</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7761275$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,780,802,885,64039</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7761275$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Chopra, Kaviraj S</creatorcontrib><creatorcontrib>Kashyap, Chandramouli V</creatorcontrib><creatorcontrib>Su, Haihua</creatorcontrib><creatorcontrib>International Business Machines Corporation</creatorcontrib><title>Synthesizing current source driver model for analysis of cell characteristics</title><description>A method for performing an analysis of at least one logic stage in a netlist, which include one or more drivers, is provided. The method includes operations of generating at least one look-up table for an output transient current to be based on values of input and output voltages using data available from a cell library; synthesizing analytically at least one current source model, which includes a DC component and a plurality of parasitic capacitances, using the look-up table; simulating the logic stage using the current source model to model the drivers; and obtaining characteristics of the simulated logic stage. A system and a machine-readable medium for performing the method are also provided.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2010</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNqNzD0KAjEQQOE0FqLeYS4g-IPmAOKyjZX2MsxOdgeyicwkwnp6FTyA1dc83txdrlMqA5u8JPVAVZVTActViaFTebLCmDuOELICJoyTiUEOQBwj0ICKVFjFipAt3SxgNF79XDhozrdTu672wPI5271X_LLx_rjd-cP-j-QNA7035A</recordid><startdate>20100720</startdate><enddate>20100720</enddate><creator>Chopra, Kaviraj S</creator><creator>Kashyap, Chandramouli V</creator><creator>Su, Haihua</creator><scope>EFH</scope></search><sort><creationdate>20100720</creationdate><title>Synthesizing current source driver model for analysis of cell characteristics</title><author>Chopra, Kaviraj S ; Kashyap, Chandramouli V ; Su, Haihua</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_077612753</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2010</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Chopra, Kaviraj S</creatorcontrib><creatorcontrib>Kashyap, Chandramouli V</creatorcontrib><creatorcontrib>Su, Haihua</creatorcontrib><creatorcontrib>International Business Machines Corporation</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Chopra, Kaviraj S</au><au>Kashyap, Chandramouli V</au><au>Su, Haihua</au><aucorp>International Business Machines Corporation</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Synthesizing current source driver model for analysis of cell characteristics</title><date>2010-07-20</date><risdate>2010</risdate><abstract>A method for performing an analysis of at least one logic stage in a netlist, which include one or more drivers, is provided. The method includes operations of generating at least one look-up table for an output transient current to be based on values of input and output voltages using data available from a cell library; synthesizing analytically at least one current source model, which includes a DC component and a plurality of parasitic capacitances, using the look-up table; simulating the logic stage using the current source model to model the drivers; and obtaining characteristics of the simulated logic stage. A system and a machine-readable medium for performing the method are also provided.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_uspatents_grants_07761275
source USPTO Issued Patents
title Synthesizing current source driver model for analysis of cell characteristics
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-19T13%3A19%3A23IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Chopra,%20Kaviraj%20S&rft.aucorp=International%20Business%20Machines%20Corporation&rft.date=2010-07-20&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E07761275%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true