Gate self aligned low noise JFET

The disclosure herein pertains to fashioning a low noise junction field effect transistor (JFET) where transistor gate materials are utilized in forming and electrically isolating active areas of a the JFET. More particularly, active regions are self aligned with patterned gate electrode material an...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Wu, Xiaoju, Hou, Fan-Chi Frank, Hao, Pinghai
Format:	Patent
Sprache:	eng
Online-Zugang:	Volltext bestellen
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