Minimum processor instruction for implementing weighted fair queuing and other priority queuing

Minimum processor instruction for implementing weighted fair queuing and other priority queuing

The present invention provides techniques for efficiently determining a minimum or maximum of a plurality of values and the index of the minimum using registers of a processor. The present invention also provides for various processor instructions for determining the minimum/maximum and index of two...

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Hauptverfasser: Zabarski, Boris, Sitbon, David, Norman, Oded
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Sprache:eng
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creator Zabarski, Boris
Sitbon, David
Norman, Oded
description The present invention provides techniques for efficiently determining a minimum or maximum of a plurality of values and the index of the minimum using registers of a processor. The present invention also provides for various processor instructions for determining the minimum/maximum and index of two or more values. The present invention finds particular benefit in implementing heaps and in systems utilizing Weighted Fair Queuing (WFQ).
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fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_07725513</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>07725513</sourcerecordid><originalsourceid>FETCH-uspatents_grants_077255133</originalsourceid><addsrcrecordid>eNqNjE0KwjAQRrNxIeod5gKCWkoPIIobd-5LaCfpQDOJkwni7W1A964e3w9vbfo7MYUSIEkcMOcoQJxVyqAUGVzNIc0YkJXYwwvJT4ojOEsCz4KltpZHiDqhLBqKQvr-TVuzcnbOuPtyY-B6eZxv-5KT1UWaey-24tB1p7Y9Ns0flw_pFj8k</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Minimum processor instruction for implementing weighted fair queuing and other priority queuing</title><source>USPTO Issued Patents</source><creator>Zabarski, Boris ; Sitbon, David ; Norman, Oded</creator><creatorcontrib>Zabarski, Boris ; Sitbon, David ; Norman, Oded ; Ikanos Communications, Inc</creatorcontrib><description>The present invention provides techniques for efficiently determining a minimum or maximum of a plurality of values and the index of the minimum using registers of a processor. The present invention also provides for various processor instructions for determining the minimum/maximum and index of two or more values. The present invention finds particular benefit in implementing heaps and in systems utilizing Weighted Fair Queuing (WFQ).</description><language>eng</language><creationdate>2010</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7725513$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,777,799,882,64018</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7725513$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Zabarski, Boris</creatorcontrib><creatorcontrib>Sitbon, David</creatorcontrib><creatorcontrib>Norman, Oded</creatorcontrib><creatorcontrib>Ikanos Communications, Inc</creatorcontrib><title>Minimum processor instruction for implementing weighted fair queuing and other priority queuing</title><description>The present invention provides techniques for efficiently determining a minimum or maximum of a plurality of values and the index of the minimum using registers of a processor. The present invention also provides for various processor instructions for determining the minimum/maximum and index of two or more values. The present invention finds particular benefit in implementing heaps and in systems utilizing Weighted Fair Queuing (WFQ).</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2010</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNqNjE0KwjAQRrNxIeod5gKCWkoPIIobd-5LaCfpQDOJkwni7W1A964e3w9vbfo7MYUSIEkcMOcoQJxVyqAUGVzNIc0YkJXYwwvJT4ojOEsCz4KltpZHiDqhLBqKQvr-TVuzcnbOuPtyY-B6eZxv-5KT1UWaey-24tB1p7Y9Ns0flw_pFj8k</recordid><startdate>20100525</startdate><enddate>20100525</enddate><creator>Zabarski, Boris</creator><creator>Sitbon, David</creator><creator>Norman, Oded</creator><scope>EFH</scope></search><sort><creationdate>20100525</creationdate><title>Minimum processor instruction for implementing weighted fair queuing and other priority queuing</title><author>Zabarski, Boris ; Sitbon, David ; Norman, Oded</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_077255133</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2010</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Zabarski, Boris</creatorcontrib><creatorcontrib>Sitbon, David</creatorcontrib><creatorcontrib>Norman, Oded</creatorcontrib><creatorcontrib>Ikanos Communications, Inc</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Zabarski, Boris</au><au>Sitbon, David</au><au>Norman, Oded</au><aucorp>Ikanos Communications, Inc</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Minimum processor instruction for implementing weighted fair queuing and other priority queuing</title><date>2010-05-25</date><risdate>2010</risdate><abstract>The present invention provides techniques for efficiently determining a minimum or maximum of a plurality of values and the index of the minimum using registers of a processor. The present invention also provides for various processor instructions for determining the minimum/maximum and index of two or more values. The present invention finds particular benefit in implementing heaps and in systems utilizing Weighted Fair Queuing (WFQ).</abstract><oa>free_for_read</oa></addata></record>
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title Minimum processor instruction for implementing weighted fair queuing and other priority queuing
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-17T22%3A56%3A51IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Zabarski,%20Boris&rft.aucorp=Ikanos%20Communications,%20Inc&rft.date=2010-05-25&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E07725513%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true