SSPC technology incorporated with thermal memory effects to achieve the fuse curve coordination

SSPC technology incorporated with thermal memory effects to achieve the fuse curve coordination

Methods and apparatuses implement a thermal memory effect for a solid state power controller. A solid state power controller trip apparatus with thermal memory according to one embodiment comprises: a trip module including a first capacitor and a counter, wherein the first capacitor charges multiple...

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Hauptverfasser: Liu, Zhenning Z, Gayowsky, Ted J, Fuller, Randy J, Yu, Wenjiang, Ye, Yang, Filimon, Daniel G, Plivcic, Boris, Nguyen, That
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Sprache:eng
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creator Liu, Zhenning Z
Gayowsky, Ted J
Fuller, Randy J
Yu, Wenjiang
Ye, Yang
Filimon, Daniel G
Plivcic, Boris
Nguyen, That
description Methods and apparatuses implement a thermal memory effect for a solid state power controller. A solid state power controller trip apparatus with thermal memory according to one embodiment comprises: a trip module including a first capacitor and a counter, wherein the first capacitor charges multiple times, when an over current event occurs, and the counter accumulates a count related to the charging of the first capacitor for the multiple times, to detect a trip condition; and a discharging module connected to the trip module, the discharging module including a resistor and a second capacitor, wherein an electrical parameter associated with the count decays with time using the resistor and the second capacitor.
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A solid state power controller trip apparatus with thermal memory according to one embodiment comprises: a trip module including a first capacitor and a counter, wherein the first capacitor charges multiple times, when an over current event occurs, and the counter accumulates a count related to the charging of the first capacitor for the multiple times, to detect a trip condition; and a discharging module connected to the trip module, the discharging module including a resistor and a second capacitor, wherein an electrical parameter associated with the count decays with time using the resistor and the second capacitor.</abstract><oa>free_for_read</oa></addata></record>
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title SSPC technology incorporated with thermal memory effects to achieve the fuse curve coordination
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