Graphics system including a plurality of heads

The graphics display system comprises a plurality of heads. Each of the heads includes a VGA controller and each of the heads is adapted for a display. The display system also includes a host coupled to the heads, wherein all the standard VGA settings for each of the heads could be programmed by a s...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Alben, Jonah Matthew, Rao, Krishnaraj S
Format: Patent
Sprache:eng
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Alben, Jonah Matthew
Rao, Krishnaraj S
description The graphics display system comprises a plurality of heads. Each of the heads includes a VGA controller and each of the heads is adapted for a display. The display system also includes a host coupled to the heads, wherein all the standard VGA settings for each of the heads could be programmed by a single command by the host. A method and system in accordance with the invention includes one VGA controller per head. In a broadcast mode a write transaction from the bus is broadcast to both heads. The output timing registers specific to a non-CRT output are not broadcast. To provide broadcast VGA to a CRT and/or a flat panel, software sets up the timing in extended registers and enables the display devices. The VGA application can provide mode settings via the appropriate write VGA registers and the correct display will be on each head.
format Patent
fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_07633461</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>07633461</sourcerecordid><originalsourceid>FETCH-uspatents_grants_076334613</originalsourceid><addsrcrecordid>eNrjZNBzL0osyMhMLlYoriwuSc1VyMxLzilNycxLV0hUKMgpLUrMySypVMhPU8hITUwp5mFgTUvMKU7lhdLcDApuriHOHrqlxQWJJal5JcXx6UWJIMrA3MzY2MTM0JgIJQDXeytz</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Graphics system including a plurality of heads</title><source>USPTO Issued Patents</source><creator>Alben, Jonah Matthew ; Rao, Krishnaraj S</creator><creatorcontrib>Alben, Jonah Matthew ; Rao, Krishnaraj S ; NVIDIA Corporation</creatorcontrib><description>The graphics display system comprises a plurality of heads. Each of the heads includes a VGA controller and each of the heads is adapted for a display. The display system also includes a host coupled to the heads, wherein all the standard VGA settings for each of the heads could be programmed by a single command by the host. A method and system in accordance with the invention includes one VGA controller per head. In a broadcast mode a write transaction from the bus is broadcast to both heads. The output timing registers specific to a non-CRT output are not broadcast. To provide broadcast VGA to a CRT and/or a flat panel, software sets up the timing in extended registers and enables the display devices. The VGA application can provide mode settings via the appropriate write VGA registers and the correct display will be on each head.</description><language>eng</language><creationdate>2009</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7633461$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,776,798,881,64015</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7633461$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Alben, Jonah Matthew</creatorcontrib><creatorcontrib>Rao, Krishnaraj S</creatorcontrib><creatorcontrib>NVIDIA Corporation</creatorcontrib><title>Graphics system including a plurality of heads</title><description>The graphics display system comprises a plurality of heads. Each of the heads includes a VGA controller and each of the heads is adapted for a display. The display system also includes a host coupled to the heads, wherein all the standard VGA settings for each of the heads could be programmed by a single command by the host. A method and system in accordance with the invention includes one VGA controller per head. In a broadcast mode a write transaction from the bus is broadcast to both heads. The output timing registers specific to a non-CRT output are not broadcast. To provide broadcast VGA to a CRT and/or a flat panel, software sets up the timing in extended registers and enables the display devices. The VGA application can provide mode settings via the appropriate write VGA registers and the correct display will be on each head.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2009</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZNBzL0osyMhMLlYoriwuSc1VyMxLzilNycxLV0hUKMgpLUrMySypVMhPU8hITUwp5mFgTUvMKU7lhdLcDApuriHOHrqlxQWJJal5JcXx6UWJIMrA3MzY2MTM0JgIJQDXeytz</recordid><startdate>20091215</startdate><enddate>20091215</enddate><creator>Alben, Jonah Matthew</creator><creator>Rao, Krishnaraj S</creator><scope>EFH</scope></search><sort><creationdate>20091215</creationdate><title>Graphics system including a plurality of heads</title><author>Alben, Jonah Matthew ; Rao, Krishnaraj S</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_076334613</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2009</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Alben, Jonah Matthew</creatorcontrib><creatorcontrib>Rao, Krishnaraj S</creatorcontrib><creatorcontrib>NVIDIA Corporation</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Alben, Jonah Matthew</au><au>Rao, Krishnaraj S</au><aucorp>NVIDIA Corporation</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Graphics system including a plurality of heads</title><date>2009-12-15</date><risdate>2009</risdate><abstract>The graphics display system comprises a plurality of heads. Each of the heads includes a VGA controller and each of the heads is adapted for a display. The display system also includes a host coupled to the heads, wherein all the standard VGA settings for each of the heads could be programmed by a single command by the host. A method and system in accordance with the invention includes one VGA controller per head. In a broadcast mode a write transaction from the bus is broadcast to both heads. The output timing registers specific to a non-CRT output are not broadcast. To provide broadcast VGA to a CRT and/or a flat panel, software sets up the timing in extended registers and enables the display devices. The VGA application can provide mode settings via the appropriate write VGA registers and the correct display will be on each head.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_uspatents_grants_07633461
source USPTO Issued Patents
title Graphics system including a plurality of heads
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-23T19%3A38%3A58IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Alben,%20Jonah%20Matthew&rft.aucorp=NVIDIA%20Corporation&rft.date=2009-12-15&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E07633461%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true