Using bit errors from memory to alter memory command stream
A system, method, and memory controller are provided that alters a memory command stream to a hardware memory. Data is written to the hardware memory and, after the data is stored in the memory, error correction code is received from the memory. Bit errors are identified based upon the error correct...
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creator | Brittain, Mark Andrew Maule, Warren Edward |
description | A system, method, and memory controller are provided that alters a memory command stream to a hardware memory. Data is written to the hardware memory and, after the data is stored in the memory, error correction code is received from the memory. Bit errors are identified based upon the error correction code that was received. The memory command stream is then altered based upon the number of bit errors that were identified. In one embodiment, altering the memory command stream includes adjusting a memory refresh rate, while in another embodiment, altering the memory command stream includes adjusting a memory usage delay. |
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fullrecord | <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_07631228</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>07631228</sourcerecordid><originalsourceid>FETCH-uspatents_grants_076312283</originalsourceid><addsrcrecordid>eNrjZLAOLc7MS1dIyixRSC0qyi8qVkgrys9VyE3NzS-qVCjJV0jMKUktgvGT83NzE_NSFIpLilITc3kYWNMSc4pTeaE0N4OCm2uIs4duaXFBYklqXklxfHpRIogyMDczNjQysjAmQgkAfAkwWA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Using bit errors from memory to alter memory command stream</title><source>USPTO Issued Patents</source><creator>Brittain, Mark Andrew ; Maule, Warren Edward</creator><creatorcontrib>Brittain, Mark Andrew ; Maule, Warren Edward ; International Business Machines Corporation</creatorcontrib><description>A system, method, and memory controller are provided that alters a memory command stream to a hardware memory. Data is written to the hardware memory and, after the data is stored in the memory, error correction code is received from the memory. Bit errors are identified based upon the error correction code that was received. The memory command stream is then altered based upon the number of bit errors that were identified. In one embodiment, altering the memory command stream includes adjusting a memory refresh rate, while in another embodiment, altering the memory command stream includes adjusting a memory usage delay.</description><language>eng</language><creationdate>2009</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7631228$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,780,802,885,64039</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7631228$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Brittain, Mark Andrew</creatorcontrib><creatorcontrib>Maule, Warren Edward</creatorcontrib><creatorcontrib>International Business Machines Corporation</creatorcontrib><title>Using bit errors from memory to alter memory command stream</title><description>A system, method, and memory controller are provided that alters a memory command stream to a hardware memory. Data is written to the hardware memory and, after the data is stored in the memory, error correction code is received from the memory. Bit errors are identified based upon the error correction code that was received. The memory command stream is then altered based upon the number of bit errors that were identified. In one embodiment, altering the memory command stream includes adjusting a memory refresh rate, while in another embodiment, altering the memory command stream includes adjusting a memory usage delay.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2009</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZLAOLc7MS1dIyixRSC0qyi8qVkgrys9VyE3NzS-qVCjJV0jMKUktgvGT83NzE_NSFIpLilITc3kYWNMSc4pTeaE0N4OCm2uIs4duaXFBYklqXklxfHpRIogyMDczNjQysjAmQgkAfAkwWA</recordid><startdate>20091208</startdate><enddate>20091208</enddate><creator>Brittain, Mark Andrew</creator><creator>Maule, Warren Edward</creator><scope>EFH</scope></search><sort><creationdate>20091208</creationdate><title>Using bit errors from memory to alter memory command stream</title><author>Brittain, Mark Andrew ; Maule, Warren Edward</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_076312283</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2009</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Brittain, Mark Andrew</creatorcontrib><creatorcontrib>Maule, Warren Edward</creatorcontrib><creatorcontrib>International Business Machines Corporation</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Brittain, Mark Andrew</au><au>Maule, Warren Edward</au><aucorp>International Business Machines Corporation</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Using bit errors from memory to alter memory command stream</title><date>2009-12-08</date><risdate>2009</risdate><abstract>A system, method, and memory controller are provided that alters a memory command stream to a hardware memory. Data is written to the hardware memory and, after the data is stored in the memory, error correction code is received from the memory. Bit errors are identified based upon the error correction code that was received. The memory command stream is then altered based upon the number of bit errors that were identified. In one embodiment, altering the memory command stream includes adjusting a memory refresh rate, while in another embodiment, altering the memory command stream includes adjusting a memory usage delay.</abstract><oa>free_for_read</oa></addata></record> |
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title | Using bit errors from memory to alter memory command stream |
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