Multiprocessor system with retry-less TLBI protocol

A symmetric multiprocessor data processing system (SMP) that implements a TLBI protocol, which enables multiple TLBI operations from multiple processors to complete without causing delay. Each processor includes a TLBI register associated with the TLB and TLBI logic. The TLBI register includes a seq...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Arimilli, Ravi Kumar, Guthrie, Guy Lynn, Livingston, Kirk Samuel
Format:	Patent
Sprache:	eng
Online-Zugang:	Volltext bestellen
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