Prefetching exception vectors by early lookup exception vectors within a cache memory

An integrated circuit processor core is provided with an instruction pipeline along which program instructions advance. When an exception condition occurs part way through execution of a particular program instruction, then a prefetch of the exception handling program instruction corresponding to th...

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Bibliographische Detailangaben

1. Verfasser:	Burdass, Andrew
Format:	Patent
Sprache:	eng
Online-Zugang:	Volltext bestellen
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