Apparatus for configuring I/O signal levels of interfacing logic circuits

Apparatus for configuring input/output signal levels of interfacing logic circuits operating at different voltage levels comprises: a logic circuit for operating at a first voltage level; a bank of input/output gates coupled to the logic circuit for interfacing input/output signals at a second volta...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Edwards, David Glen, Johnson, Brian Matthew, Shaw, Mark A, Haden, Stuart C
Format: Patent
Sprache:eng
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Edwards, David Glen
Johnson, Brian Matthew
Shaw, Mark A
Haden, Stuart C
description Apparatus for configuring input/output signal levels of interfacing logic circuits operating at different voltage levels comprises: a logic circuit for operating at a first voltage level; a bank of input/output gates coupled to the logic circuit for interfacing input/output signals at a second voltage level, different from the first voltage level, to the logic circuit, the bank of gates including a port for setting the operational voltage level thereof; and a control circuit coupled to the port and governed by a control signal to configure the operational voltage level of the bank of gates to render the logic circuit and the interfacing input/output signals voltage level compatible.
format Patent
fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_07589560</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>07589560</sourcerecordid><originalsourceid>FETCH-uspatents_grants_075895603</originalsourceid><addsrcrecordid>eNqNyj0KQjEMAOAuDqLeIRcQH8jzZxRRfJOLu4TQlkBoS5J6fnngAZy-5VuG6dIaKno3SFWBakmcu3LJMO2eYJwLCkj8RDGoCbh41IQ0B6mZCYiVOrutwyKhWNz8XAW4317Xx7ZbQ4_F7Z0VZ4bjeDqPh2H_R_kCkP41hA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Apparatus for configuring I/O signal levels of interfacing logic circuits</title><source>USPTO Issued Patents</source><creator>Edwards, David Glen ; Johnson, Brian Matthew ; Shaw, Mark A ; Haden, Stuart C</creator><creatorcontrib>Edwards, David Glen ; Johnson, Brian Matthew ; Shaw, Mark A ; Haden, Stuart C ; Hewlett-Packard Development Company, L.P</creatorcontrib><description>Apparatus for configuring input/output signal levels of interfacing logic circuits operating at different voltage levels comprises: a logic circuit for operating at a first voltage level; a bank of input/output gates coupled to the logic circuit for interfacing input/output signals at a second voltage level, different from the first voltage level, to the logic circuit, the bank of gates including a port for setting the operational voltage level thereof; and a control circuit coupled to the port and governed by a control signal to configure the operational voltage level of the bank of gates to render the logic circuit and the interfacing input/output signals voltage level compatible.</description><language>eng</language><creationdate>2009</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7589560$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,780,802,885,64039</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7589560$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Edwards, David Glen</creatorcontrib><creatorcontrib>Johnson, Brian Matthew</creatorcontrib><creatorcontrib>Shaw, Mark A</creatorcontrib><creatorcontrib>Haden, Stuart C</creatorcontrib><creatorcontrib>Hewlett-Packard Development Company, L.P</creatorcontrib><title>Apparatus for configuring I/O signal levels of interfacing logic circuits</title><description>Apparatus for configuring input/output signal levels of interfacing logic circuits operating at different voltage levels comprises: a logic circuit for operating at a first voltage level; a bank of input/output gates coupled to the logic circuit for interfacing input/output signals at a second voltage level, different from the first voltage level, to the logic circuit, the bank of gates including a port for setting the operational voltage level thereof; and a control circuit coupled to the port and governed by a control signal to configure the operational voltage level of the bank of gates to render the logic circuit and the interfacing input/output signals voltage level compatible.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2009</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNqNyj0KQjEMAOAuDqLeIRcQH8jzZxRRfJOLu4TQlkBoS5J6fnngAZy-5VuG6dIaKno3SFWBakmcu3LJMO2eYJwLCkj8RDGoCbh41IQ0B6mZCYiVOrutwyKhWNz8XAW4317Xx7ZbQ4_F7Z0VZ4bjeDqPh2H_R_kCkP41hA</recordid><startdate>20090915</startdate><enddate>20090915</enddate><creator>Edwards, David Glen</creator><creator>Johnson, Brian Matthew</creator><creator>Shaw, Mark A</creator><creator>Haden, Stuart C</creator><scope>EFH</scope></search><sort><creationdate>20090915</creationdate><title>Apparatus for configuring I/O signal levels of interfacing logic circuits</title><author>Edwards, David Glen ; Johnson, Brian Matthew ; Shaw, Mark A ; Haden, Stuart C</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_075895603</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2009</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Edwards, David Glen</creatorcontrib><creatorcontrib>Johnson, Brian Matthew</creatorcontrib><creatorcontrib>Shaw, Mark A</creatorcontrib><creatorcontrib>Haden, Stuart C</creatorcontrib><creatorcontrib>Hewlett-Packard Development Company, L.P</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Edwards, David Glen</au><au>Johnson, Brian Matthew</au><au>Shaw, Mark A</au><au>Haden, Stuart C</au><aucorp>Hewlett-Packard Development Company, L.P</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Apparatus for configuring I/O signal levels of interfacing logic circuits</title><date>2009-09-15</date><risdate>2009</risdate><abstract>Apparatus for configuring input/output signal levels of interfacing logic circuits operating at different voltage levels comprises: a logic circuit for operating at a first voltage level; a bank of input/output gates coupled to the logic circuit for interfacing input/output signals at a second voltage level, different from the first voltage level, to the logic circuit, the bank of gates including a port for setting the operational voltage level thereof; and a control circuit coupled to the port and governed by a control signal to configure the operational voltage level of the bank of gates to render the logic circuit and the interfacing input/output signals voltage level compatible.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_uspatents_grants_07589560
source USPTO Issued Patents
title Apparatus for configuring I/O signal levels of interfacing logic circuits
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-26T12%3A51%3A57IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Edwards,%20David%20Glen&rft.aucorp=Hewlett-Packard%20Development%20Company,%20L.P&rft.date=2009-09-15&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E07589560%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true