Semiconductor device

Semiconductor device

A plurality of the same kind of npn-type bipolar transistors are disposed regularly on a semiconductor layer that is provided over an insulation layer. The plurality of unit bipolar transistors are connected in parallel, thereby to form a plurality of desired bipolar transistors. A deep trench isola...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Tamaki, Yoichi, Nonami, Hideaki, Hamamoto, Masato
Format: Patent
Sprache:eng
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Tamaki, Yoichi
Nonami, Hideaki
Hamamoto, Masato
description A plurality of the same kind of npn-type bipolar transistors are disposed regularly on a semiconductor layer that is provided over an insulation layer. The plurality of unit bipolar transistors are connected in parallel, thereby to form a plurality of desired bipolar transistors. A deep trench isolation surrounds a group of or the whole of the plurality of unit bipolar transistors that are connected in parallel, for a plurality of desired bipolar transistor that require thermal stability.
format Patent
fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_07576406</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>07576406</sourcerecordid><originalsourceid>FETCH-uspatents_grants_075764063</originalsourceid><addsrcrecordid>eNrjZBAJTs3NTM7PSylNLskvUkhJLctMTuVhYE1LzClO5YXS3AwKbq4hzh66pcUFiSWpeSXF8elFiSDKwNzU3MzEwMyYCCUASukh3g</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor device</title><source>USPTO Issued Patents</source><creator>Tamaki, Yoichi ; Nonami, Hideaki ; Hamamoto, Masato</creator><creatorcontrib>Tamaki, Yoichi ; Nonami, Hideaki ; Hamamoto, Masato ; Hitachi, Ltd</creatorcontrib><description>A plurality of the same kind of npn-type bipolar transistors are disposed regularly on a semiconductor layer that is provided over an insulation layer. The plurality of unit bipolar transistors are connected in parallel, thereby to form a plurality of desired bipolar transistors. A deep trench isolation surrounds a group of or the whole of the plurality of unit bipolar transistors that are connected in parallel, for a plurality of desired bipolar transistor that require thermal stability.</description><language>eng</language><creationdate>2009</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7576406$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,780,802,885,64039</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7576406$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Tamaki, Yoichi</creatorcontrib><creatorcontrib>Nonami, Hideaki</creatorcontrib><creatorcontrib>Hamamoto, Masato</creatorcontrib><creatorcontrib>Hitachi, Ltd</creatorcontrib><title>Semiconductor device</title><description>A plurality of the same kind of npn-type bipolar transistors are disposed regularly on a semiconductor layer that is provided over an insulation layer. The plurality of unit bipolar transistors are connected in parallel, thereby to form a plurality of desired bipolar transistors. A deep trench isolation surrounds a group of or the whole of the plurality of unit bipolar transistors that are connected in parallel, for a plurality of desired bipolar transistor that require thermal stability.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2009</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZBAJTs3NTM7PSylNLskvUkhJLctMTuVhYE1LzClO5YXS3AwKbq4hzh66pcUFiSWpeSXF8elFiSDKwNzU3MzEwMyYCCUASukh3g</recordid><startdate>20090818</startdate><enddate>20090818</enddate><creator>Tamaki, Yoichi</creator><creator>Nonami, Hideaki</creator><creator>Hamamoto, Masato</creator><scope>EFH</scope></search><sort><creationdate>20090818</creationdate><title>Semiconductor device</title><author>Tamaki, Yoichi ; Nonami, Hideaki ; Hamamoto, Masato</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_075764063</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2009</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Tamaki, Yoichi</creatorcontrib><creatorcontrib>Nonami, Hideaki</creatorcontrib><creatorcontrib>Hamamoto, Masato</creatorcontrib><creatorcontrib>Hitachi, Ltd</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Tamaki, Yoichi</au><au>Nonami, Hideaki</au><au>Hamamoto, Masato</au><aucorp>Hitachi, Ltd</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device</title><date>2009-08-18</date><risdate>2009</risdate><abstract>A plurality of the same kind of npn-type bipolar transistors are disposed regularly on a semiconductor layer that is provided over an insulation layer. The plurality of unit bipolar transistors are connected in parallel, thereby to form a plurality of desired bipolar transistors. A deep trench isolation surrounds a group of or the whole of the plurality of unit bipolar transistors that are connected in parallel, for a plurality of desired bipolar transistor that require thermal stability.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_uspatents_grants_07576406
source USPTO Issued Patents
title Semiconductor device
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-28T03%3A47%3A48IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Tamaki,%20Yoichi&rft.aucorp=Hitachi,%20Ltd&rft.date=2009-08-18&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E07576406%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true