Semiconductor apparatus and manufacturing method

Semiconductor apparatus and manufacturing method

Pb free solder is used in die bonding. A thermal stress reduction plate is disposed between a semiconductor chip and a die pad made of a Cu alloy. The semiconductor chip and the thermal stress reduction plate are joined and the thermal stress reduction plate and the die pad are joined by a joint mat...

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Hauptverfasser: Kajiwara, Ryouichi, Itou, Kazutoshi, Kagii, Hidemasa, Oka, Hiroi, Nakamura, Hiroyuki
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Sprache:eng
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creator Kajiwara, Ryouichi
Itou, Kazutoshi
Kagii, Hidemasa
Oka, Hiroi
Nakamura, Hiroyuki
description Pb free solder is used in die bonding. A thermal stress reduction plate is disposed between a semiconductor chip and a die pad made of a Cu alloy. The semiconductor chip and the thermal stress reduction plate are joined and the thermal stress reduction plate and the die pad are joined by a joint material of Pb free solder having Sn-Sb-Ag-Cu as its main constituent elements and having a solidus temperature not lower than 270° C. and a liquidus temperature not higher than 400° C. Thus, die bonding can be performed using the Pb free solder without generating any chip crack.
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fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_07528489</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>07528489</sourcerecordid><originalsourceid>FETCH-uspatents_grants_075284893</originalsourceid><addsrcrecordid>eNrjZDAITs3NTM7PSylNLskvUkgsKEgsSiwpLVZIzEtRyE3MK01LTC4pLcrMS1fITS3JyE_hYWBNS8wpTuWF0twMCm6uIc4euqXFBYklqXklxfHpRYkgysDc1MjCxMLSmAglAINQLPM</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor apparatus and manufacturing method</title><source>USPTO Issued Patents</source><creator>Kajiwara, Ryouichi ; Itou, Kazutoshi ; Kagii, Hidemasa ; Oka, Hiroi ; Nakamura, Hiroyuki</creator><creatorcontrib>Kajiwara, Ryouichi ; Itou, Kazutoshi ; Kagii, Hidemasa ; Oka, Hiroi ; Nakamura, Hiroyuki ; Renesas Technology Corp</creatorcontrib><description>Pb free solder is used in die bonding. A thermal stress reduction plate is disposed between a semiconductor chip and a die pad made of a Cu alloy. The semiconductor chip and the thermal stress reduction plate are joined and the thermal stress reduction plate and the die pad are joined by a joint material of Pb free solder having Sn-Sb-Ag-Cu as its main constituent elements and having a solidus temperature not lower than 270° C. and a liquidus temperature not higher than 400° C. Thus, die bonding can be performed using the Pb free solder without generating any chip crack.</description><language>eng</language><creationdate>2009</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7528489$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,776,798,881,64015</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7528489$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Kajiwara, Ryouichi</creatorcontrib><creatorcontrib>Itou, Kazutoshi</creatorcontrib><creatorcontrib>Kagii, Hidemasa</creatorcontrib><creatorcontrib>Oka, Hiroi</creatorcontrib><creatorcontrib>Nakamura, Hiroyuki</creatorcontrib><creatorcontrib>Renesas Technology Corp</creatorcontrib><title>Semiconductor apparatus and manufacturing method</title><description>Pb free solder is used in die bonding. A thermal stress reduction plate is disposed between a semiconductor chip and a die pad made of a Cu alloy. The semiconductor chip and the thermal stress reduction plate are joined and the thermal stress reduction plate and the die pad are joined by a joint material of Pb free solder having Sn-Sb-Ag-Cu as its main constituent elements and having a solidus temperature not lower than 270° C. and a liquidus temperature not higher than 400° C. Thus, die bonding can be performed using the Pb free solder without generating any chip crack.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2009</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZDAITs3NTM7PSylNLskvUkgsKEgsSiwpLVZIzEtRyE3MK01LTC4pLcrMS1fITS3JyE_hYWBNS8wpTuWF0twMCm6uIc4euqXFBYklqXklxfHpRYkgysDc1MjCxMLSmAglAINQLPM</recordid><startdate>20090505</startdate><enddate>20090505</enddate><creator>Kajiwara, Ryouichi</creator><creator>Itou, Kazutoshi</creator><creator>Kagii, Hidemasa</creator><creator>Oka, Hiroi</creator><creator>Nakamura, Hiroyuki</creator><scope>EFH</scope></search><sort><creationdate>20090505</creationdate><title>Semiconductor apparatus and manufacturing method</title><author>Kajiwara, Ryouichi ; Itou, Kazutoshi ; Kagii, Hidemasa ; Oka, Hiroi ; Nakamura, Hiroyuki</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_075284893</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2009</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Kajiwara, Ryouichi</creatorcontrib><creatorcontrib>Itou, Kazutoshi</creatorcontrib><creatorcontrib>Kagii, Hidemasa</creatorcontrib><creatorcontrib>Oka, Hiroi</creatorcontrib><creatorcontrib>Nakamura, Hiroyuki</creatorcontrib><creatorcontrib>Renesas Technology Corp</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Kajiwara, Ryouichi</au><au>Itou, Kazutoshi</au><au>Kagii, Hidemasa</au><au>Oka, Hiroi</au><au>Nakamura, Hiroyuki</au><aucorp>Renesas Technology Corp</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor apparatus and manufacturing method</title><date>2009-05-05</date><risdate>2009</risdate><abstract>Pb free solder is used in die bonding. A thermal stress reduction plate is disposed between a semiconductor chip and a die pad made of a Cu alloy. The semiconductor chip and the thermal stress reduction plate are joined and the thermal stress reduction plate and the die pad are joined by a joint material of Pb free solder having Sn-Sb-Ag-Cu as its main constituent elements and having a solidus temperature not lower than 270° C. and a liquidus temperature not higher than 400° C. Thus, die bonding can be performed using the Pb free solder without generating any chip crack.</abstract><oa>free_for_read</oa></addata></record>
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title Semiconductor apparatus and manufacturing method
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-24T07%3A44%3A40IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Kajiwara,%20Ryouichi&rft.aucorp=Renesas%20Technology%20Corp&rft.date=2009-05-05&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E07528489%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true