Method and system for dynamic processor speed control to always maximize processor performance based on processing load and available power

A method and system for controlling clocking speed of a processor, is provided. One implementation involves receiving a real-time precision signal representing available power from a power supply output, monitoring said real-time precision signal, and dynamically adjusting the clocking speed of the processor based on the monitored signal for dynamic processor speed throttling based on available power, whereby the processor is clocked at the maximum speed that matches the maximum output power available from the power supply, wherein the processor clock frequency is adjusted up or down continuously to always maximize processor performance based on available power at the system level.