I/O circuitry for reducing ground bounce and VCC sag in integrated circuit devices

I/O circuitry for reducing ground bounce and VCC sag in integrated circuit devices

Methods and circuitry for reducing ground bounce and VCC sag effects in integrated circuit ("IC") devices is provided. In particular, a via-programmable design for I/O circuitry in IC devices is provided. The via-programmable I/O circuitry is used to disconnect I/O pin driver circuitry fro...

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Hauptverfasser: Lee, Eng H, Loo, Kok W
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Sprache:eng
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creator Lee, Eng H
Loo, Kok W
description Methods and circuitry for reducing ground bounce and VCC sag effects in integrated circuit ("IC") devices is provided. In particular, a via-programmable design for I/O circuitry in IC devices is provided. The via-programmable I/O circuitry is used to disconnect I/O pin driver circuitry from and create a substantially direct connection between unused I/O pins and the ground and/or VCC signals of an IC device to reduce ground bounce and VCC sag, respectively.
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title I/O circuitry for reducing ground bounce and VCC sag in integrated circuit devices
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