Integrated circuit with signal bus formed by cell abutment of logic cells

Integrated circuit with signal bus formed by cell abutment of logic cells

An integrated circuit with a signal bus formed by the cell abutment of logic cells. The integrated circuit comprises at least two logic cells. The signal bus is formed by cell abutment of the at least two logic cells. The signal bus is configured to receive a signal and to distribute the signal to e...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Hillman, Daniel L, Walker, William G
Format: Patent
Sprache:eng
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Hillman, Daniel L
Walker, William G
description An integrated circuit with a signal bus formed by the cell abutment of logic cells. The integrated circuit comprises at least two logic cells. The signal bus is formed by cell abutment of the at least two logic cells. The signal bus is configured to receive a signal and to distribute the signal to each of the at least two logic cells.
format Patent
fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_07508256</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>07508256</sourcerecordid><originalsourceid>FETCH-uspatents_grants_075082563</originalsourceid><addsrcrecordid>eNrjZPD0zCtJTS9KLElNUUjOLEouzSxRKM8syVAozkzPS8xRSCotVkjLL8oFSidVKiSn5uQoJCaVluSm5pUo5Kcp5OSnZyaDhYt5GFjTEnOKU3mhNDeDgptriLOHbmlxAdD4vJLieKA9IMrA3NTAwsjUzJgIJQCLaTVM</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Integrated circuit with signal bus formed by cell abutment of logic cells</title><source>USPTO Issued Patents</source><creator>Hillman, Daniel L ; Walker, William G</creator><creatorcontrib>Hillman, Daniel L ; Walker, William G ; MOSAID Technologies Corporation</creatorcontrib><description>An integrated circuit with a signal bus formed by the cell abutment of logic cells. The integrated circuit comprises at least two logic cells. The signal bus is formed by cell abutment of the at least two logic cells. The signal bus is configured to receive a signal and to distribute the signal to each of the at least two logic cells.</description><language>eng</language><creationdate>2009</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7508256$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,780,802,885,64039</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7508256$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Hillman, Daniel L</creatorcontrib><creatorcontrib>Walker, William G</creatorcontrib><creatorcontrib>MOSAID Technologies Corporation</creatorcontrib><title>Integrated circuit with signal bus formed by cell abutment of logic cells</title><description>An integrated circuit with a signal bus formed by the cell abutment of logic cells. The integrated circuit comprises at least two logic cells. The signal bus is formed by cell abutment of the at least two logic cells. The signal bus is configured to receive a signal and to distribute the signal to each of the at least two logic cells.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2009</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZPD0zCtJTS9KLElNUUjOLEouzSxRKM8syVAozkzPS8xRSCotVkjLL8oFSidVKiSn5uQoJCaVluSm5pUo5Kcp5OSnZyaDhYt5GFjTEnOKU3mhNDeDgptriLOHbmlxAdD4vJLieKA9IMrA3NTAwsjUzJgIJQCLaTVM</recordid><startdate>20090324</startdate><enddate>20090324</enddate><creator>Hillman, Daniel L</creator><creator>Walker, William G</creator><scope>EFH</scope></search><sort><creationdate>20090324</creationdate><title>Integrated circuit with signal bus formed by cell abutment of logic cells</title><author>Hillman, Daniel L ; Walker, William G</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_075082563</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2009</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Hillman, Daniel L</creatorcontrib><creatorcontrib>Walker, William G</creatorcontrib><creatorcontrib>MOSAID Technologies Corporation</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Hillman, Daniel L</au><au>Walker, William G</au><aucorp>MOSAID Technologies Corporation</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Integrated circuit with signal bus formed by cell abutment of logic cells</title><date>2009-03-24</date><risdate>2009</risdate><abstract>An integrated circuit with a signal bus formed by the cell abutment of logic cells. The integrated circuit comprises at least two logic cells. The signal bus is formed by cell abutment of the at least two logic cells. The signal bus is configured to receive a signal and to distribute the signal to each of the at least two logic cells.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_uspatents_grants_07508256
source USPTO Issued Patents
title Integrated circuit with signal bus formed by cell abutment of logic cells
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-26T20%3A11%3A17IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Hillman,%20Daniel%20L&rft.aucorp=MOSAID%20Technologies%20Corporation&rft.date=2009-03-24&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E07508256%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true