Method of fabricating semiconductor device

A method of fabricating a semiconductor device comprises sequentially forming a first conductive layer, a first insulating interlayer, a second conductive layer, and a second insulating interlayer on a semiconductor substrate. A mask layer is formed on the second insulating interlayer, and then the...

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Hauptverfasser: Kwak, Byung-Ho, Chang, Bum-Soo
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creator Kwak, Byung-Ho
Chang, Bum-Soo
description A method of fabricating a semiconductor device comprises sequentially forming a first conductive layer, a first insulating interlayer, a second conductive layer, and a second insulating interlayer on a semiconductor substrate. A mask layer is formed on the second insulating interlayer, and then the second insulating interlayer, the second conductive layer, and the first insulating interlayer are selectively removed using the mask layer as an etch mask to form a contact hole exposing the first conductive layer. Portions of the second conductive layer exposed in sidewalls of the contact hole are then selectively etched to form a recess between the first and second insulating interlayers. Next, a third conductive layer is formed on a bottom surface and on sidewalls of the contact hole, a metal silicide layer is formed to fill the recess, and a fourth conductive layer is formed to fill the contact hole over the metal silicide layer.
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fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_07476614</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>07476614</sourcerecordid><originalsourceid>FETCH-uspatents_grants_074766143</originalsourceid><addsrcrecordid>eNrjZNDyTS3JyE9RyE9TSEtMKspMTizJzEtXKE7NzUzOz0spTS7JL1JISS3LTE7lYWBNS8wpTuWF0twMCm6uIc4euqXFBYklqXklxfHpRYkgysDcxNzMzNDEmAglABmxKiQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method of fabricating semiconductor device</title><source>USPTO Issued Patents</source><creator>Kwak, Byung-Ho ; Chang, Bum-Soo</creator><creatorcontrib>Kwak, Byung-Ho ; Chang, Bum-Soo ; Samsung Electronics Co., Ltd</creatorcontrib><description>A method of fabricating a semiconductor device comprises sequentially forming a first conductive layer, a first insulating interlayer, a second conductive layer, and a second insulating interlayer on a semiconductor substrate. A mask layer is formed on the second insulating interlayer, and then the second insulating interlayer, the second conductive layer, and the first insulating interlayer are selectively removed using the mask layer as an etch mask to form a contact hole exposing the first conductive layer. Portions of the second conductive layer exposed in sidewalls of the contact hole are then selectively etched to form a recess between the first and second insulating interlayers. Next, a third conductive layer is formed on a bottom surface and on sidewalls of the contact hole, a metal silicide layer is formed to fill the recess, and a fourth conductive layer is formed to fill the contact hole over the metal silicide layer.</description><language>eng</language><creationdate>2009</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7476614$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,776,798,881,64012</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7476614$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Kwak, Byung-Ho</creatorcontrib><creatorcontrib>Chang, Bum-Soo</creatorcontrib><creatorcontrib>Samsung Electronics Co., Ltd</creatorcontrib><title>Method of fabricating semiconductor device</title><description>A method of fabricating a semiconductor device comprises sequentially forming a first conductive layer, a first insulating interlayer, a second conductive layer, and a second insulating interlayer on a semiconductor substrate. A mask layer is formed on the second insulating interlayer, and then the second insulating interlayer, the second conductive layer, and the first insulating interlayer are selectively removed using the mask layer as an etch mask to form a contact hole exposing the first conductive layer. Portions of the second conductive layer exposed in sidewalls of the contact hole are then selectively etched to form a recess between the first and second insulating interlayers. Next, a third conductive layer is formed on a bottom surface and on sidewalls of the contact hole, a metal silicide layer is formed to fill the recess, and a fourth conductive layer is formed to fill the contact hole over the metal silicide layer.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2009</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZNDyTS3JyE9RyE9TSEtMKspMTizJzEtXKE7NzUzOz0spTS7JL1JISS3LTE7lYWBNS8wpTuWF0twMCm6uIc4euqXFBYklqXklxfHpRYkgysDcxNzMzNDEmAglABmxKiQ</recordid><startdate>20090113</startdate><enddate>20090113</enddate><creator>Kwak, Byung-Ho</creator><creator>Chang, Bum-Soo</creator><scope>EFH</scope></search><sort><creationdate>20090113</creationdate><title>Method of fabricating semiconductor device</title><author>Kwak, Byung-Ho ; Chang, Bum-Soo</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_074766143</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2009</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Kwak, Byung-Ho</creatorcontrib><creatorcontrib>Chang, Bum-Soo</creatorcontrib><creatorcontrib>Samsung Electronics Co., Ltd</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Kwak, Byung-Ho</au><au>Chang, Bum-Soo</au><aucorp>Samsung Electronics Co., Ltd</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method of fabricating semiconductor device</title><date>2009-01-13</date><risdate>2009</risdate><abstract>A method of fabricating a semiconductor device comprises sequentially forming a first conductive layer, a first insulating interlayer, a second conductive layer, and a second insulating interlayer on a semiconductor substrate. A mask layer is formed on the second insulating interlayer, and then the second insulating interlayer, the second conductive layer, and the first insulating interlayer are selectively removed using the mask layer as an etch mask to form a contact hole exposing the first conductive layer. Portions of the second conductive layer exposed in sidewalls of the contact hole are then selectively etched to form a recess between the first and second insulating interlayers. Next, a third conductive layer is formed on a bottom surface and on sidewalls of the contact hole, a metal silicide layer is formed to fill the recess, and a fourth conductive layer is formed to fill the contact hole over the metal silicide layer.</abstract><oa>free_for_read</oa></addata></record>
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title Method of fabricating semiconductor device
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-07T13%3A26%3A06IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Kwak,%20Byung-Ho&rft.aucorp=Samsung%20Electronics%20Co.,%20Ltd&rft.date=2009-01-13&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E07476614%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true