Semiconductor device including semiconductor memory element and method for producing same

A wafer, in which a plurality of rectangular regions are defined on the face of the wafer by streets arranged in a lattice pattern, and a semiconductor memory element is disposed in each of the rectangular regions, is divided along the streets to separate the rectangular regions individually, thereb...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: Nanjo, Masatoshi
Format: Patent
Sprache:eng
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Nanjo, Masatoshi
description A wafer, in which a plurality of rectangular regions are defined on the face of the wafer by streets arranged in a lattice pattern, and a semiconductor memory element is disposed in each of the rectangular regions, is divided along the streets to separate the rectangular regions individually, thereby forming a plurality of semiconductor devices. Before the wafer is divided along the streets, a strained layer having a thickness of 0.20 μm or less, especially 0.05 to 0.20 μm, is formed in the back of the wafer. The strained layer is formed by grinding the back of the semiconductor wafer by a grinding member formed by bonding diamond abrasive grains having a grain size of 4 μm or less by a bonding material.
format Patent
fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_07459767</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>07459767</sourcerecordid><originalsourceid>FETCH-uspatents_grants_074597673</originalsourceid><addsrcrecordid>eNrjZIgMTs3NTM7PSylNLskvUkhJLctMTlXIzEvOKU3JzEtXKEaRzk3NzS-qVEjNSc1NzStRSMxLAQqVZOSnKKQBZQuK8oHqwLoSc1N5GFjTEnOKU3mhNDeDgptriLOHbmlxQWIJUHtxfHpRIogyMDcxtTQ3MzcmQgkAGPs8gg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor device including semiconductor memory element and method for producing same</title><source>USPTO Issued Patents</source><creator>Nanjo, Masatoshi</creator><creatorcontrib>Nanjo, Masatoshi ; Disco Corporation</creatorcontrib><description>A wafer, in which a plurality of rectangular regions are defined on the face of the wafer by streets arranged in a lattice pattern, and a semiconductor memory element is disposed in each of the rectangular regions, is divided along the streets to separate the rectangular regions individually, thereby forming a plurality of semiconductor devices. Before the wafer is divided along the streets, a strained layer having a thickness of 0.20 μm or less, especially 0.05 to 0.20 μm, is formed in the back of the wafer. The strained layer is formed by grinding the back of the semiconductor wafer by a grinding member formed by bonding diamond abrasive grains having a grain size of 4 μm or less by a bonding material.</description><language>eng</language><creationdate>2008</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7459767$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,776,798,881,64012</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7459767$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Nanjo, Masatoshi</creatorcontrib><creatorcontrib>Disco Corporation</creatorcontrib><title>Semiconductor device including semiconductor memory element and method for producing same</title><description>A wafer, in which a plurality of rectangular regions are defined on the face of the wafer by streets arranged in a lattice pattern, and a semiconductor memory element is disposed in each of the rectangular regions, is divided along the streets to separate the rectangular regions individually, thereby forming a plurality of semiconductor devices. Before the wafer is divided along the streets, a strained layer having a thickness of 0.20 μm or less, especially 0.05 to 0.20 μm, is formed in the back of the wafer. The strained layer is formed by grinding the back of the semiconductor wafer by a grinding member formed by bonding diamond abrasive grains having a grain size of 4 μm or less by a bonding material.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2008</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZIgMTs3NTM7PSylNLskvUkhJLctMTlXIzEvOKU3JzEtXKEaRzk3NzS-qVEjNSc1NzStRSMxLAQqVZOSnKKQBZQuK8oHqwLoSc1N5GFjTEnOKU3mhNDeDgptriLOHbmlxQWIJUHtxfHpRIogyMDcxtTQ3MzcmQgkAGPs8gg</recordid><startdate>20081202</startdate><enddate>20081202</enddate><creator>Nanjo, Masatoshi</creator><scope>EFH</scope></search><sort><creationdate>20081202</creationdate><title>Semiconductor device including semiconductor memory element and method for producing same</title><author>Nanjo, Masatoshi</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_074597673</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2008</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Nanjo, Masatoshi</creatorcontrib><creatorcontrib>Disco Corporation</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Nanjo, Masatoshi</au><aucorp>Disco Corporation</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device including semiconductor memory element and method for producing same</title><date>2008-12-02</date><risdate>2008</risdate><abstract>A wafer, in which a plurality of rectangular regions are defined on the face of the wafer by streets arranged in a lattice pattern, and a semiconductor memory element is disposed in each of the rectangular regions, is divided along the streets to separate the rectangular regions individually, thereby forming a plurality of semiconductor devices. Before the wafer is divided along the streets, a strained layer having a thickness of 0.20 μm or less, especially 0.05 to 0.20 μm, is formed in the back of the wafer. The strained layer is formed by grinding the back of the semiconductor wafer by a grinding member formed by bonding diamond abrasive grains having a grain size of 4 μm or less by a bonding material.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_uspatents_grants_07459767
source USPTO Issued Patents
title Semiconductor device including semiconductor memory element and method for producing same
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-08T23%3A34%3A07IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Nanjo,%20Masatoshi&rft.aucorp=Disco%20Corporation&rft.date=2008-12-02&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E07459767%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true