Semiconductor device having a leading wiring layer

A manufacturing method of a semiconductor device, comprising the steps of forming an insulation layer, which has an opening section in an area including an area on an electrode pad, on a top surface of the semiconductor substrate on which the electrode pad is formed; at least forming a first barrier...

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Bibliographische Detailangaben

Hauptverfasser:	Suminoe, Shinji, Nakanishi, Hiroyuki, Ishio, Toshiya, Iwazaki, Yoshihide, Mori, Katsunobu
Format:	Patent
Sprache:	eng
Online-Zugang:	Volltext bestellen
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