Interconnections for flip-chip using lead-free solders and having reaction barrier layers
An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing le...
Gespeichert in:
Hauptverfasser: | , , , , , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | Fogel, Keith E Ghosal, Balaram Kang, Sung K Kilpatrick, Stephen Lauro, Paul A Nye, III, Henry A Shih, Da-Yuan Zupanski-Nielsen, Donna S |
description | An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components. |
format | Patent |
fullrecord | <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_07410833</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>07410833</sourcerecordid><originalsourceid>FETCH-uspatents_grants_074108333</originalsourceid><addsrcrecordid>eNqNizEKAjEQANNYiPqH_UDgJIL2cqK9jZWsyeYuEDZhNyf4ez3xAVZTzMzS3C7cSHxhJt9SYYVYBGJO1foxVZg08QCZMNgoRKAlBxIF5AAjPmcphN8VHiiSSCDj65OszSJiVtr8uDJw6q_Hs520YiNueh8EZ3T73bY7OOf-SN7BYzvN</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Interconnections for flip-chip using lead-free solders and having reaction barrier layers</title><source>USPTO Issued Patents</source><creator>Fogel, Keith E ; Ghosal, Balaram ; Kang, Sung K ; Kilpatrick, Stephen ; Lauro, Paul A ; Nye, III, Henry A ; Shih, Da-Yuan ; Zupanski-Nielsen, Donna S</creator><creatorcontrib>Fogel, Keith E ; Ghosal, Balaram ; Kang, Sung K ; Kilpatrick, Stephen ; Lauro, Paul A ; Nye, III, Henry A ; Shih, Da-Yuan ; Zupanski-Nielsen, Donna S ; International Business Machines Corporation</creatorcontrib><description>An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.</description><language>eng</language><creationdate>2008</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7410833$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,780,802,885,64038</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7410833$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Fogel, Keith E</creatorcontrib><creatorcontrib>Ghosal, Balaram</creatorcontrib><creatorcontrib>Kang, Sung K</creatorcontrib><creatorcontrib>Kilpatrick, Stephen</creatorcontrib><creatorcontrib>Lauro, Paul A</creatorcontrib><creatorcontrib>Nye, III, Henry A</creatorcontrib><creatorcontrib>Shih, Da-Yuan</creatorcontrib><creatorcontrib>Zupanski-Nielsen, Donna S</creatorcontrib><creatorcontrib>International Business Machines Corporation</creatorcontrib><title>Interconnections for flip-chip using lead-free solders and having reaction barrier layers</title><description>An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2008</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNqNizEKAjEQANNYiPqH_UDgJIL2cqK9jZWsyeYuEDZhNyf4ez3xAVZTzMzS3C7cSHxhJt9SYYVYBGJO1foxVZg08QCZMNgoRKAlBxIF5AAjPmcphN8VHiiSSCDj65OszSJiVtr8uDJw6q_Hs520YiNueh8EZ3T73bY7OOf-SN7BYzvN</recordid><startdate>20080812</startdate><enddate>20080812</enddate><creator>Fogel, Keith E</creator><creator>Ghosal, Balaram</creator><creator>Kang, Sung K</creator><creator>Kilpatrick, Stephen</creator><creator>Lauro, Paul A</creator><creator>Nye, III, Henry A</creator><creator>Shih, Da-Yuan</creator><creator>Zupanski-Nielsen, Donna S</creator><scope>EFH</scope></search><sort><creationdate>20080812</creationdate><title>Interconnections for flip-chip using lead-free solders and having reaction barrier layers</title><author>Fogel, Keith E ; Ghosal, Balaram ; Kang, Sung K ; Kilpatrick, Stephen ; Lauro, Paul A ; Nye, III, Henry A ; Shih, Da-Yuan ; Zupanski-Nielsen, Donna S</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_074108333</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2008</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Fogel, Keith E</creatorcontrib><creatorcontrib>Ghosal, Balaram</creatorcontrib><creatorcontrib>Kang, Sung K</creatorcontrib><creatorcontrib>Kilpatrick, Stephen</creatorcontrib><creatorcontrib>Lauro, Paul A</creatorcontrib><creatorcontrib>Nye, III, Henry A</creatorcontrib><creatorcontrib>Shih, Da-Yuan</creatorcontrib><creatorcontrib>Zupanski-Nielsen, Donna S</creatorcontrib><creatorcontrib>International Business Machines Corporation</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Fogel, Keith E</au><au>Ghosal, Balaram</au><au>Kang, Sung K</au><au>Kilpatrick, Stephen</au><au>Lauro, Paul A</au><au>Nye, III, Henry A</au><au>Shih, Da-Yuan</au><au>Zupanski-Nielsen, Donna S</au><aucorp>International Business Machines Corporation</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Interconnections for flip-chip using lead-free solders and having reaction barrier layers</title><date>2008-08-12</date><risdate>2008</risdate><abstract>An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_uspatents_grants_07410833 |
source | USPTO Issued Patents |
title | Interconnections for flip-chip using lead-free solders and having reaction barrier layers |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-11T05%3A29%3A16IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Fogel,%20Keith%20E&rft.aucorp=International%20Business%20Machines%20Corporation&rft.date=2008-08-12&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E07410833%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |