Magnetic memory device having XP cell and Str cell in one chip

According to the semiconductor memory device of this invention, an XP type MRAM cell array and an STr type MRAM cell array are formed on a single chip. The XP type MRAM cell array is laid over the STr type MRAM cell array to form a layered structure. The STr type MRAM cell array serves as a work mem...

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1. Verfasser: Okazawa, Takeshi
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creator Okazawa, Takeshi
description According to the semiconductor memory device of this invention, an XP type MRAM cell array and an STr type MRAM cell array are formed on a single chip. The XP type MRAM cell array is laid over the STr type MRAM cell array to form a layered structure. The STr type MRAM cell array serves as a work memory area, while the XP type MRAM cell array serves as a data storage area. A cell of the XP type MRAM cell array and a cell of the STr type MRAM cell array may be connected to a same bit-line. By passing predetermined current through the bit-line, and passing current through a first word-line connected to the cell of the XP type MRAM cell array, and through a second word-line connected to the cell of the STr type MRAM cell array, it is possible to simultaneously write data into the cells of the XP and STr type MRAM cell arrays.
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fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_07405958</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>07405958</sourcerecordid><originalsourceid>FETCH-uspatents_grants_074059583</originalsourceid><addsrcrecordid>eNrjZLDzTUzPSy3JTFbITc3NL6pUSEkty0xOVchILMvMS1eICFBITs3JUUjMS1EILimCcDLzFPLzUhWSMzILeBhY0xJzilN5oTQ3g4Kba4izh25pcUFiSWpeSXF8elEiiDIwNzEwtTS1MCZCCQCfWTA-</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Magnetic memory device having XP cell and Str cell in one chip</title><source>USPTO Issued Patents</source><creator>Okazawa, Takeshi</creator><creatorcontrib>Okazawa, Takeshi ; NEC Electronics Corporation</creatorcontrib><description>According to the semiconductor memory device of this invention, an XP type MRAM cell array and an STr type MRAM cell array are formed on a single chip. The XP type MRAM cell array is laid over the STr type MRAM cell array to form a layered structure. The STr type MRAM cell array serves as a work memory area, while the XP type MRAM cell array serves as a data storage area. A cell of the XP type MRAM cell array and a cell of the STr type MRAM cell array may be connected to a same bit-line. By passing predetermined current through the bit-line, and passing current through a first word-line connected to the cell of the XP type MRAM cell array, and through a second word-line connected to the cell of the STr type MRAM cell array, it is possible to simultaneously write data into the cells of the XP and STr type MRAM cell arrays.</description><language>eng</language><creationdate>2008</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7405958$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,780,802,885,64039</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7405958$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Okazawa, Takeshi</creatorcontrib><creatorcontrib>NEC Electronics Corporation</creatorcontrib><title>Magnetic memory device having XP cell and Str cell in one chip</title><description>According to the semiconductor memory device of this invention, an XP type MRAM cell array and an STr type MRAM cell array are formed on a single chip. The XP type MRAM cell array is laid over the STr type MRAM cell array to form a layered structure. The STr type MRAM cell array serves as a work memory area, while the XP type MRAM cell array serves as a data storage area. A cell of the XP type MRAM cell array and a cell of the STr type MRAM cell array may be connected to a same bit-line. By passing predetermined current through the bit-line, and passing current through a first word-line connected to the cell of the XP type MRAM cell array, and through a second word-line connected to the cell of the STr type MRAM cell array, it is possible to simultaneously write data into the cells of the XP and STr type MRAM cell arrays.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2008</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZLDzTUzPSy3JTFbITc3NL6pUSEkty0xOVchILMvMS1eICFBITs3JUUjMS1EILimCcDLzFPLzUhWSMzILeBhY0xJzilN5oTQ3g4Kba4izh25pcUFiSWpeSXF8elEiiDIwNzEwtTS1MCZCCQCfWTA-</recordid><startdate>20080729</startdate><enddate>20080729</enddate><creator>Okazawa, Takeshi</creator><scope>EFH</scope></search><sort><creationdate>20080729</creationdate><title>Magnetic memory device having XP cell and Str cell in one chip</title><author>Okazawa, Takeshi</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_074059583</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2008</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Okazawa, Takeshi</creatorcontrib><creatorcontrib>NEC Electronics Corporation</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Okazawa, Takeshi</au><aucorp>NEC Electronics Corporation</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Magnetic memory device having XP cell and Str cell in one chip</title><date>2008-07-29</date><risdate>2008</risdate><abstract>According to the semiconductor memory device of this invention, an XP type MRAM cell array and an STr type MRAM cell array are formed on a single chip. The XP type MRAM cell array is laid over the STr type MRAM cell array to form a layered structure. The STr type MRAM cell array serves as a work memory area, while the XP type MRAM cell array serves as a data storage area. A cell of the XP type MRAM cell array and a cell of the STr type MRAM cell array may be connected to a same bit-line. By passing predetermined current through the bit-line, and passing current through a first word-line connected to the cell of the XP type MRAM cell array, and through a second word-line connected to the cell of the STr type MRAM cell array, it is possible to simultaneously write data into the cells of the XP and STr type MRAM cell arrays.</abstract><oa>free_for_read</oa></addata></record>
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title Magnetic memory device having XP cell and Str cell in one chip
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-05T19%3A21%3A05IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Okazawa,%20Takeshi&rft.aucorp=NEC%20Electronics%20Corporation&rft.date=2008-07-29&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E07405958%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true