Circuits and methods of implementing flip-flops in dual-output lookup tables
Circuits and methods of implementing flip-flops in dual-output lookup tables (LUTs). A flip-flop is implemented by programming a dual-output LUT to include a first function implementing a master latch and a second function implementing a slave latch. An output of the master latch is provided at a fi...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | Circuits and methods of implementing flip-flops in dual-output lookup tables (LUTs). A flip-flop is implemented by programming a dual-output LUT to include a first function implementing a master latch and a second function implementing a slave latch. An output of the master latch is provided at a first output terminal of the LUT, and an output of the slave latch is provided at a second output terminal of the LUT. The output of the master latch (the first output of the LUT) is coupled to a first input terminal of the LUT, where it drives both the first and second functions. The output of the slave latch (the second output of the LUT) is coupled to a second input terminal of the LUT, where it drives the second function. A clock signal is provided to both first and second functions via a third input terminal of the LUT. |
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