Post-silicon test coverage verification

Post-silicon test coverage verification

In one embodiment, the invention is directed to a method of optimizing post-silicon test coverage for a system under test ("SUT"). The method comprises defining coverage data comprising Hardware Description Language ("HDL") events; testing the SUT using a system exerciser connect...

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Bibliographische Detailangaben
1. Verfasser: Johnson, Tyler James
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:In one embodiment, the invention is directed to a method of optimizing post-silicon test coverage for a system under test ("SUT"). The method comprises defining coverage data comprising Hardware Description Language ("HDL") events; testing the SUT using a system exerciser connected to the SUT; comparing the results of the testing with the coverage data to identify underutilized areas of functionality of the SUT; and responsive to the comparing operation, performing additional tests.