Semiconductor device and method for manufacturing the same

Semiconductor device and method for manufacturing the same

A semiconductor device according to an embodiment of the present invention has a gate electrode which is formed on a semiconductor substrate via a gate insulating film, and which has a slit portion; side wall films formed at both side faces of the gate electrode and at side walls of the slit portion...

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Hauptverfasser: Nakayama, Kazuya, Aida, Satoshi, Kouzuki, Shigeo, Izumisawa, Masaru
Format: Patent
Sprache:eng
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creator Nakayama, Kazuya
Aida, Satoshi
Kouzuki, Shigeo
Izumisawa, Masaru
description A semiconductor device according to an embodiment of the present invention has a gate electrode which is formed on a semiconductor substrate via a gate insulating film, and which has a slit portion; side wall films formed at both side faces of the gate electrode and at side walls of the slit portion, and which fill an interior of the slit portion and cover the gate insulating film directly beneath the slit portion; and an interlayer insulating film formed to cover the gate electrode and the side wall films.
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fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_07341900</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>07341900</sourcerecordid><originalsourceid>FETCH-uspatents_grants_073419003</originalsourceid><addsrcrecordid>eNrjZLAKTs3NTM7PSylNLskvUkhJLctMTlVIzEtRyE0tychPUUgDiuYm5pWmJSaXlBZl5qUrlGSkKhQn5qbyMLCmJeYUp_JCaW4GBTfXEGcP3dLigsSS1LyS4vj0okQQZWBubGJoaWBgTIQSAFjSMAQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor device and method for manufacturing the same</title><source>USPTO Issued Patents</source><creator>Nakayama, Kazuya ; Aida, Satoshi ; Kouzuki, Shigeo ; Izumisawa, Masaru</creator><creatorcontrib>Nakayama, Kazuya ; Aida, Satoshi ; Kouzuki, Shigeo ; Izumisawa, Masaru ; Kabushiki Kaisha Toshiba</creatorcontrib><description>A semiconductor device according to an embodiment of the present invention has a gate electrode which is formed on a semiconductor substrate via a gate insulating film, and which has a slit portion; side wall films formed at both side faces of the gate electrode and at side walls of the slit portion, and which fill an interior of the slit portion and cover the gate insulating film directly beneath the slit portion; and an interlayer insulating film formed to cover the gate electrode and the side wall films.</description><language>eng</language><creationdate>2008</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7341900$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,776,798,881,64012</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7341900$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Nakayama, Kazuya</creatorcontrib><creatorcontrib>Aida, Satoshi</creatorcontrib><creatorcontrib>Kouzuki, Shigeo</creatorcontrib><creatorcontrib>Izumisawa, Masaru</creatorcontrib><creatorcontrib>Kabushiki Kaisha Toshiba</creatorcontrib><title>Semiconductor device and method for manufacturing the same</title><description>A semiconductor device according to an embodiment of the present invention has a gate electrode which is formed on a semiconductor substrate via a gate insulating film, and which has a slit portion; side wall films formed at both side faces of the gate electrode and at side walls of the slit portion, and which fill an interior of the slit portion and cover the gate insulating film directly beneath the slit portion; and an interlayer insulating film formed to cover the gate electrode and the side wall films.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2008</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZLAKTs3NTM7PSylNLskvUkhJLctMTlVIzEtRyE0tychPUUgDiuYm5pWmJSaXlBZl5qUrlGSkKhQn5qbyMLCmJeYUp_JCaW4GBTfXEGcP3dLigsSS1LyS4vj0okQQZWBubGJoaWBgTIQSAFjSMAQ</recordid><startdate>20080311</startdate><enddate>20080311</enddate><creator>Nakayama, Kazuya</creator><creator>Aida, Satoshi</creator><creator>Kouzuki, Shigeo</creator><creator>Izumisawa, Masaru</creator><scope>EFH</scope></search><sort><creationdate>20080311</creationdate><title>Semiconductor device and method for manufacturing the same</title><author>Nakayama, Kazuya ; Aida, Satoshi ; Kouzuki, Shigeo ; Izumisawa, Masaru</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_073419003</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2008</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Nakayama, Kazuya</creatorcontrib><creatorcontrib>Aida, Satoshi</creatorcontrib><creatorcontrib>Kouzuki, Shigeo</creatorcontrib><creatorcontrib>Izumisawa, Masaru</creatorcontrib><creatorcontrib>Kabushiki Kaisha Toshiba</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Nakayama, Kazuya</au><au>Aida, Satoshi</au><au>Kouzuki, Shigeo</au><au>Izumisawa, Masaru</au><aucorp>Kabushiki Kaisha Toshiba</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device and method for manufacturing the same</title><date>2008-03-11</date><risdate>2008</risdate><abstract>A semiconductor device according to an embodiment of the present invention has a gate electrode which is formed on a semiconductor substrate via a gate insulating film, and which has a slit portion; side wall films formed at both side faces of the gate electrode and at side walls of the slit portion, and which fill an interior of the slit portion and cover the gate insulating film directly beneath the slit portion; and an interlayer insulating film formed to cover the gate electrode and the side wall films.</abstract><oa>free_for_read</oa></addata></record>
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title Semiconductor device and method for manufacturing the same
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-03T21%3A25%3A28IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Nakayama,%20Kazuya&rft.aucorp=Kabushiki%20Kaisha%20Toshiba&rft.date=2008-03-11&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E07341900%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true