Cache control method and processor system

A cache control method controls data sharing conditions in a processor system having multi-level caches that are in an inclusion relationship. The cache control method indexes an upper level cache by a real address and indexes a lower level cache by a virtual address, and prevents a real address tha...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Sakata, Hideki, Nakada, Tatsumi, Ito, Eiki, Nodomi, Akira
Format:	Patent
Sprache:	eng
Online-Zugang:	Volltext bestellen
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