Method for forming solder bump structure

A solder bump structure may be formed using a dual exposure technique of a photoresist, which may be a positive photoresist. The positive photoresist may be coated on an IC chip. First openings may be formed at first exposed regions of the photoresist by a first exposure process. Metal projections m...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Ma, Keum-Hee, Jeong, Se-Young, Jang, Dong-Hyeon, Kim, Gu-Sung
Format: Patent
Sprache:eng
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Ma, Keum-Hee
Jeong, Se-Young
Jang, Dong-Hyeon
Kim, Gu-Sung
description A solder bump structure may be formed using a dual exposure technique of a photoresist, which may be a positive photoresist. The positive photoresist may be coated on an IC chip. First openings may be formed at first exposed regions of the photoresist by a first exposure process. Metal projections may be formed in the first openings. A second opening may be formed at a second exposed region of the photoresist by a second exposure process. The second exposed region may include non-exposed regions defined by the first exposure process. A solder material may fill the second opening and may be reflowed to form a solder bump. The metal projections may be embedded within the solder bump.
format Patent
fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_07300864</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>07300864</sourcerecordid><originalsourceid>FETCH-uspatents_grants_073008643</originalsourceid><addsrcrecordid>eNrjZNDwTS3JyE9RSMsvAuHczLx0heL8nJTUIoWk0twCheKSotLkktKiVB4G1rTEnOJUXijNzaDg5hri7KFbWlyQWJKaV1Icn16UCKIMzI0NDCzMTIyJUAIAuW8pXQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method for forming solder bump structure</title><source>USPTO Issued Patents</source><creator>Ma, Keum-Hee ; Jeong, Se-Young ; Jang, Dong-Hyeon ; Kim, Gu-Sung</creator><creatorcontrib>Ma, Keum-Hee ; Jeong, Se-Young ; Jang, Dong-Hyeon ; Kim, Gu-Sung ; Samsung Electronics Co., Ltd</creatorcontrib><description>A solder bump structure may be formed using a dual exposure technique of a photoresist, which may be a positive photoresist. The positive photoresist may be coated on an IC chip. First openings may be formed at first exposed regions of the photoresist by a first exposure process. Metal projections may be formed in the first openings. A second opening may be formed at a second exposed region of the photoresist by a second exposure process. The second exposed region may include non-exposed regions defined by the first exposure process. A solder material may fill the second opening and may be reflowed to form a solder bump. The metal projections may be embedded within the solder bump.</description><language>eng</language><creationdate>2007</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7300864$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,780,802,885,64038</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7300864$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Ma, Keum-Hee</creatorcontrib><creatorcontrib>Jeong, Se-Young</creatorcontrib><creatorcontrib>Jang, Dong-Hyeon</creatorcontrib><creatorcontrib>Kim, Gu-Sung</creatorcontrib><creatorcontrib>Samsung Electronics Co., Ltd</creatorcontrib><title>Method for forming solder bump structure</title><description>A solder bump structure may be formed using a dual exposure technique of a photoresist, which may be a positive photoresist. The positive photoresist may be coated on an IC chip. First openings may be formed at first exposed regions of the photoresist by a first exposure process. Metal projections may be formed in the first openings. A second opening may be formed at a second exposed region of the photoresist by a second exposure process. The second exposed region may include non-exposed regions defined by the first exposure process. A solder material may fill the second opening and may be reflowed to form a solder bump. The metal projections may be embedded within the solder bump.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2007</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZNDwTS3JyE9RSMsvAuHczLx0heL8nJTUIoWk0twCheKSotLkktKiVB4G1rTEnOJUXijNzaDg5hri7KFbWlyQWJKaV1Icn16UCKIMzI0NDCzMTIyJUAIAuW8pXQ</recordid><startdate>20071127</startdate><enddate>20071127</enddate><creator>Ma, Keum-Hee</creator><creator>Jeong, Se-Young</creator><creator>Jang, Dong-Hyeon</creator><creator>Kim, Gu-Sung</creator><scope>EFH</scope></search><sort><creationdate>20071127</creationdate><title>Method for forming solder bump structure</title><author>Ma, Keum-Hee ; Jeong, Se-Young ; Jang, Dong-Hyeon ; Kim, Gu-Sung</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_073008643</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2007</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Ma, Keum-Hee</creatorcontrib><creatorcontrib>Jeong, Se-Young</creatorcontrib><creatorcontrib>Jang, Dong-Hyeon</creatorcontrib><creatorcontrib>Kim, Gu-Sung</creatorcontrib><creatorcontrib>Samsung Electronics Co., Ltd</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Ma, Keum-Hee</au><au>Jeong, Se-Young</au><au>Jang, Dong-Hyeon</au><au>Kim, Gu-Sung</au><aucorp>Samsung Electronics Co., Ltd</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method for forming solder bump structure</title><date>2007-11-27</date><risdate>2007</risdate><abstract>A solder bump structure may be formed using a dual exposure technique of a photoresist, which may be a positive photoresist. The positive photoresist may be coated on an IC chip. First openings may be formed at first exposed regions of the photoresist by a first exposure process. Metal projections may be formed in the first openings. A second opening may be formed at a second exposed region of the photoresist by a second exposure process. The second exposed region may include non-exposed regions defined by the first exposure process. A solder material may fill the second opening and may be reflowed to form a solder bump. The metal projections may be embedded within the solder bump.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_uspatents_grants_07300864
source USPTO Issued Patents
title Method for forming solder bump structure
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-08T14%3A47%3A25IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Ma,%20Keum-Hee&rft.aucorp=Samsung%20Electronics%20Co.,%20Ltd&rft.date=2007-11-27&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E07300864%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true