Memory interface supporting multi-stream operation

A memory device includes one or more memory arrays and an interface controller for exchanging memory contents data with a semiconductor device over a communication link. The exchanging of data occurs within sequential transactions. Each transaction is associated with a block of consecutive memory lo...

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1. Verfasser: Falik, Ohad
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description A memory device includes one or more memory arrays and an interface controller for exchanging memory contents data with a semiconductor device over a communication link. The exchanging of data occurs within sequential transactions. Each transaction is associated with a block of consecutive memory locations and with a starting address. The interface controller includes at least two address buffers, each for storing any of the starting addresses and any address obtained by incrementation thereof.
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fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_07296124</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>07296124</sourcerecordid><originalsourceid>FETCH-uspatents_grants_072961243</originalsourceid><addsrcrecordid>eNrjZDDyTc3NL6pUyMwrSS1KS0xOVSguLSjILyrJzEtXyC3NKcnULS4pSk3MVcgvSC1KLMnMz-NhYE1LzClO5YXS3AwKbq4hzh66pcUFiSWpeSXF8elFiSDKwNzI0szQyMSYCCUA9FQtvw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Memory interface supporting multi-stream operation</title><source>USPTO Issued Patents</source><creator>Falik, Ohad</creator><creatorcontrib>Falik, Ohad ; National Semiconductor Corporation</creatorcontrib><description>A memory device includes one or more memory arrays and an interface controller for exchanging memory contents data with a semiconductor device over a communication link. The exchanging of data occurs within sequential transactions. Each transaction is associated with a block of consecutive memory locations and with a starting address. The interface controller includes at least two address buffers, each for storing any of the starting addresses and any address obtained by incrementation thereof.</description><language>eng</language><creationdate>2007</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7296124$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,309,781,803,886,64044</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7296124$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Falik, Ohad</creatorcontrib><creatorcontrib>National Semiconductor Corporation</creatorcontrib><title>Memory interface supporting multi-stream operation</title><description>A memory device includes one or more memory arrays and an interface controller for exchanging memory contents data with a semiconductor device over a communication link. The exchanging of data occurs within sequential transactions. Each transaction is associated with a block of consecutive memory locations and with a starting address. The interface controller includes at least two address buffers, each for storing any of the starting addresses and any address obtained by incrementation thereof.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2007</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZDDyTc3NL6pUyMwrSS1KS0xOVSguLSjILyrJzEtXyC3NKcnULS4pSk3MVcgvSC1KLMnMz-NhYE1LzClO5YXS3AwKbq4hzh66pcUFiSWpeSXF8elFiSDKwNzI0szQyMSYCCUA9FQtvw</recordid><startdate>20071113</startdate><enddate>20071113</enddate><creator>Falik, Ohad</creator><scope>EFH</scope></search><sort><creationdate>20071113</creationdate><title>Memory interface supporting multi-stream operation</title><author>Falik, Ohad</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_072961243</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2007</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Falik, Ohad</creatorcontrib><creatorcontrib>National Semiconductor Corporation</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Falik, Ohad</au><aucorp>National Semiconductor Corporation</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Memory interface supporting multi-stream operation</title><date>2007-11-13</date><risdate>2007</risdate><abstract>A memory device includes one or more memory arrays and an interface controller for exchanging memory contents data with a semiconductor device over a communication link. The exchanging of data occurs within sequential transactions. Each transaction is associated with a block of consecutive memory locations and with a starting address. The interface controller includes at least two address buffers, each for storing any of the starting addresses and any address obtained by incrementation thereof.</abstract><oa>free_for_read</oa></addata></record>
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title Memory interface supporting multi-stream operation
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-14T12%3A44%3A27IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Falik,%20Ohad&rft.aucorp=National%20Semiconductor%20Corporation&rft.date=2007-11-13&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E07296124%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true