Fast pattern processor including a function interface system

Fast pattern processor including a function interface system

A fast pattern processor having an internal function bus and an external function bus. In one embodiment, a fast pattern processor includes: (1) an internal function bus, (2) an external function bus, (3) a context memory having a block buffer and a argument signature register wherein the block buff...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Bennett, Victor A, Brown, David A, McGee, Sean W, Sonnier, David P, Zsohar, Leslie
Format: Patent
Sprache:eng
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Bennett, Victor A
Brown, David A
McGee, Sean W
Sonnier, David P
Zsohar, Leslie
description A fast pattern processor having an internal function bus and an external function bus. In one embodiment, a fast pattern processor includes: (1) an internal function bus, (2) an external function bus, (3) a context memory having a block buffer and a argument signature register wherein the block buffer includes processing blocks associated with a protocol data unit (PDU), (4) a pattern processing engine, associated with the context memory, that performs pattern matching and (5) a function interface system having (5A) a controller arbitration subsystem and (5B) a dispatch subsystem.
format Patent
fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_07275117</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>07275117</sourcerecordid><originalsourceid>FETCH-uspatents_grants_072751173</originalsourceid><addsrcrecordid>eNrjZLBxSywuUShILClJLcpTKCjKT04tLs4vUsjMS84pTcnMS1dIVEgrzUsuyczPAwoCVaUlJqcqFFcWl6Tm8jCwpiXmFKfyQmluBgU31xBnD93SYqCJqXklxfHpRYkgysDcyNzU0NDcmAglAOvZMTM</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Fast pattern processor including a function interface system</title><source>USPTO Issued Patents</source><creator>Bennett, Victor A ; Brown, David A ; McGee, Sean W ; Sonnier, David P ; Zsohar, Leslie</creator><creatorcontrib>Bennett, Victor A ; Brown, David A ; McGee, Sean W ; Sonnier, David P ; Zsohar, Leslie ; Agere Systems Inc</creatorcontrib><description>A fast pattern processor having an internal function bus and an external function bus. In one embodiment, a fast pattern processor includes: (1) an internal function bus, (2) an external function bus, (3) a context memory having a block buffer and a argument signature register wherein the block buffer includes processing blocks associated with a protocol data unit (PDU), (4) a pattern processing engine, associated with the context memory, that performs pattern matching and (5) a function interface system having (5A) a controller arbitration subsystem and (5B) a dispatch subsystem.</description><language>eng</language><creationdate>2007</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7275117$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,776,798,881,64012</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7275117$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Bennett, Victor A</creatorcontrib><creatorcontrib>Brown, David A</creatorcontrib><creatorcontrib>McGee, Sean W</creatorcontrib><creatorcontrib>Sonnier, David P</creatorcontrib><creatorcontrib>Zsohar, Leslie</creatorcontrib><creatorcontrib>Agere Systems Inc</creatorcontrib><title>Fast pattern processor including a function interface system</title><description>A fast pattern processor having an internal function bus and an external function bus. In one embodiment, a fast pattern processor includes: (1) an internal function bus, (2) an external function bus, (3) a context memory having a block buffer and a argument signature register wherein the block buffer includes processing blocks associated with a protocol data unit (PDU), (4) a pattern processing engine, associated with the context memory, that performs pattern matching and (5) a function interface system having (5A) a controller arbitration subsystem and (5B) a dispatch subsystem.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2007</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZLBxSywuUShILClJLcpTKCjKT04tLs4vUsjMS84pTcnMS1dIVEgrzUsuyczPAwoCVaUlJqcqFFcWl6Tm8jCwpiXmFKfyQmluBgU31xBnD93SYqCJqXklxfHpRYkgysDcyNzU0NDcmAglAOvZMTM</recordid><startdate>20070925</startdate><enddate>20070925</enddate><creator>Bennett, Victor A</creator><creator>Brown, David A</creator><creator>McGee, Sean W</creator><creator>Sonnier, David P</creator><creator>Zsohar, Leslie</creator><scope>EFH</scope></search><sort><creationdate>20070925</creationdate><title>Fast pattern processor including a function interface system</title><author>Bennett, Victor A ; Brown, David A ; McGee, Sean W ; Sonnier, David P ; Zsohar, Leslie</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_072751173</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2007</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Bennett, Victor A</creatorcontrib><creatorcontrib>Brown, David A</creatorcontrib><creatorcontrib>McGee, Sean W</creatorcontrib><creatorcontrib>Sonnier, David P</creatorcontrib><creatorcontrib>Zsohar, Leslie</creatorcontrib><creatorcontrib>Agere Systems Inc</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Bennett, Victor A</au><au>Brown, David A</au><au>McGee, Sean W</au><au>Sonnier, David P</au><au>Zsohar, Leslie</au><aucorp>Agere Systems Inc</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Fast pattern processor including a function interface system</title><date>2007-09-25</date><risdate>2007</risdate><abstract>A fast pattern processor having an internal function bus and an external function bus. In one embodiment, a fast pattern processor includes: (1) an internal function bus, (2) an external function bus, (3) a context memory having a block buffer and a argument signature register wherein the block buffer includes processing blocks associated with a protocol data unit (PDU), (4) a pattern processing engine, associated with the context memory, that performs pattern matching and (5) a function interface system having (5A) a controller arbitration subsystem and (5B) a dispatch subsystem.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_uspatents_grants_07275117
source USPTO Issued Patents
title Fast pattern processor including a function interface system
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-19T02%3A06%3A34IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Bennett,%20Victor%20A&rft.aucorp=Agere%20Systems%20Inc&rft.date=2007-09-25&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E07275117%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true