Timer lockout circuit for synchronous applications

A SDRAM. The SDRAM including: at least one bank of DRAM cells; the SDRAM operable to a first specification defined by a first clock frequency, a first write recovery time and a first time interval for precharge to row address strobe; and means for programming the SDRAM operable to a second specifica...

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Bibliographische Detailangaben

Hauptverfasser:	Jacunski, Mark D, Norris, Alan D, Weinstein, Samuel K
Format:	Patent
Sprache:	eng
Online-Zugang:	Volltext bestellen
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