Reconfiguration port for dynamic reconfiguration

Reconfiguration port for dynamic reconfiguration

Method and apparatus for dynamic configuration of function block logic of an integrated circuit is described. The integrated circuit includes a reconfiguration port coupled to a controller. The controller is coupled to an array of memory cell. A portion of the array of memory cells is coupled for re...

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Hauptverfasser: Vadi, Vasisht Mantra, Schultz, David P, Logue, John D, McGrath, John, Collins, Anthony, Goetting, F. Erich
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Sprache:eng
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creator Vadi, Vasisht Mantra
Schultz, David P
Logue, John D
McGrath, John
Collins, Anthony
Goetting, F. Erich
description Method and apparatus for dynamic configuration of function block logic of an integrated circuit is described. The integrated circuit includes a reconfiguration port coupled to a controller. The controller is coupled to an array of memory cell. A portion of the array of memory cells is coupled for read/write communication with the controller, and another portion of the array of memory cells is not coupled for read/write communication with the controller. The portion of the array of memory cells is configurable at an operational frequency of the integrated circuit for dynamic reconfiguration of the function block logic of the integrated circuit.
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title Reconfiguration port for dynamic reconfiguration
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