Single mask MIM capacitor and resistor with in trench copper drift barrier
The formation of a MIM (metal insulator metal) capacitor and concurrent formation of a resistor is disclosed. A copper diffusion barrier is formed over a copper deposition that serves as a bottom electrode of the capacitor. The copper diffusion barrier mitigates unwanted diffusion of copper from the...
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creator | Rao, Satyavolu Srinivas Papa Crenshaw, Darius Lammont Grunow, Stephan Brennan, Kenneth D Joshi, Somit Leavy, Montray Matz, Phillip D Ajmera, Sameer Kumar Solomentsev, Yuri E |
description | The formation of a MIM (metal insulator metal) capacitor and concurrent formation of a resistor is disclosed. A copper diffusion barrier is formed over a copper deposition that serves as a bottom electrode of the capacitor. The copper diffusion barrier mitigates unwanted diffusion of copper from the copper deposition, and is formed via electro-less deposition such that little to none of the barrier material is deposited at locations other than over a top surface of the deposition of copper/bottom electrode. Subsequently, layers of dielectric and conductive materials are applied to form a dielectric and top electrode of the MIM capacitor, respectively, where the layer of conductive top electrode material also functions to concurrently develop the resistor on the same chip as the capacitor. |
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A copper diffusion barrier is formed over a copper deposition that serves as a bottom electrode of the capacitor. The copper diffusion barrier mitigates unwanted diffusion of copper from the copper deposition, and is formed via electro-less deposition such that little to none of the barrier material is deposited at locations other than over a top surface of the deposition of copper/bottom electrode. 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A copper diffusion barrier is formed over a copper deposition that serves as a bottom electrode of the capacitor. The copper diffusion barrier mitigates unwanted diffusion of copper from the copper deposition, and is formed via electro-less deposition such that little to none of the barrier material is deposited at locations other than over a top surface of the deposition of copper/bottom electrode. Subsequently, layers of dielectric and conductive materials are applied to form a dielectric and top electrode of the MIM capacitor, respectively, where the layer of conductive top electrode material also functions to concurrently develop the resistor on the same chip as the capacitor.</abstract><oa>free_for_read</oa></addata></record> |
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title | Single mask MIM capacitor and resistor with in trench copper drift barrier |
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