Method and apparatus for forming and dispatching instruction groups based on priority comparisons

Method and apparatus for forming and dispatching instruction groups based on priority comparisons

Methods and apparatuses for dispatching instructions executed by at least one functional unit of a data processor, each one of the instructions having a corresponding priority number, in a data processing system having at least one host processor with host processor cache and host memory are describ...

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Hauptverfasser: Trivedi, Sushma Shrikant, Bratt, Joseph P, Benkual, Jack, Hochsprung, Ronald Ray, Iwamoto, Derek Fujio
Format: Patent
Sprache:eng
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creator Trivedi, Sushma Shrikant
Bratt, Joseph P
Benkual, Jack
Hochsprung, Ronald Ray
Iwamoto, Derek Fujio
description Methods and apparatuses for dispatching instructions executed by at least one functional unit of a data processor, each one of the instructions having a corresponding priority number, in a data processing system having at least one host processor with host processor cache and host memory are described herein. In one aspect of the invention, an exemplary method includes receiving a next instruction from an instruction stream, examining a current instruction group to determine if the current instruction group is completed, adding the next instruction to the current instruction group if the current instruction group is not completed, and dispatching the current instruction group if the current instruction group is completed.
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fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_07114058</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>07114058</sourcerecordid><originalsourceid>FETCH-uspatents_grants_071140583</originalsourceid><addsrcrecordid>eNqNjDEKAjEQRbexEPUOcwFhFxXtRbGxs5cxye4O7GbCzKTw9ibiASw-j8f__GWD92Aje8BYkhIKWlboWWpmisO38aQJzY3VKapJdkYcYRDOSeGFGjwUT0IsZG9wPJcvUo66bhY9Tho2P64auF4e59s2188QTZ-DYEV77Lp9ezjt_ph8ABr_P3c</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method and apparatus for forming and dispatching instruction groups based on priority comparisons</title><source>USPTO Issued Patents</source><creator>Trivedi, Sushma Shrikant ; Bratt, Joseph P ; Benkual, Jack ; Hochsprung, Ronald Ray ; Iwamoto, Derek Fujio</creator><creatorcontrib>Trivedi, Sushma Shrikant ; Bratt, Joseph P ; Benkual, Jack ; Hochsprung, Ronald Ray ; Iwamoto, Derek Fujio ; Apple Computer, Inc</creatorcontrib><description>Methods and apparatuses for dispatching instructions executed by at least one functional unit of a data processor, each one of the instructions having a corresponding priority number, in a data processing system having at least one host processor with host processor cache and host memory are described herein. In one aspect of the invention, an exemplary method includes receiving a next instruction from an instruction stream, examining a current instruction group to determine if the current instruction group is completed, adding the next instruction to the current instruction group if the current instruction group is not completed, and dispatching the current instruction group if the current instruction group is completed.</description><language>eng</language><creationdate>2006</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7114058$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,776,798,881,64012</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7114058$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Trivedi, Sushma Shrikant</creatorcontrib><creatorcontrib>Bratt, Joseph P</creatorcontrib><creatorcontrib>Benkual, Jack</creatorcontrib><creatorcontrib>Hochsprung, Ronald Ray</creatorcontrib><creatorcontrib>Iwamoto, Derek Fujio</creatorcontrib><creatorcontrib>Apple Computer, Inc</creatorcontrib><title>Method and apparatus for forming and dispatching instruction groups based on priority comparisons</title><description>Methods and apparatuses for dispatching instructions executed by at least one functional unit of a data processor, each one of the instructions having a corresponding priority number, in a data processing system having at least one host processor with host processor cache and host memory are described herein. In one aspect of the invention, an exemplary method includes receiving a next instruction from an instruction stream, examining a current instruction group to determine if the current instruction group is completed, adding the next instruction to the current instruction group if the current instruction group is not completed, and dispatching the current instruction group if the current instruction group is completed.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2006</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNqNjDEKAjEQRbexEPUOcwFhFxXtRbGxs5cxye4O7GbCzKTw9ibiASw-j8f__GWD92Aje8BYkhIKWlboWWpmisO38aQJzY3VKapJdkYcYRDOSeGFGjwUT0IsZG9wPJcvUo66bhY9Tho2P64auF4e59s2188QTZ-DYEV77Lp9ezjt_ph8ABr_P3c</recordid><startdate>20060926</startdate><enddate>20060926</enddate><creator>Trivedi, Sushma Shrikant</creator><creator>Bratt, Joseph P</creator><creator>Benkual, Jack</creator><creator>Hochsprung, Ronald Ray</creator><creator>Iwamoto, Derek Fujio</creator><scope>EFH</scope></search><sort><creationdate>20060926</creationdate><title>Method and apparatus for forming and dispatching instruction groups based on priority comparisons</title><author>Trivedi, Sushma Shrikant ; Bratt, Joseph P ; Benkual, Jack ; Hochsprung, Ronald Ray ; Iwamoto, Derek Fujio</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_071140583</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2006</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Trivedi, Sushma Shrikant</creatorcontrib><creatorcontrib>Bratt, Joseph P</creatorcontrib><creatorcontrib>Benkual, Jack</creatorcontrib><creatorcontrib>Hochsprung, Ronald Ray</creatorcontrib><creatorcontrib>Iwamoto, Derek Fujio</creatorcontrib><creatorcontrib>Apple Computer, Inc</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Trivedi, Sushma Shrikant</au><au>Bratt, Joseph P</au><au>Benkual, Jack</au><au>Hochsprung, Ronald Ray</au><au>Iwamoto, Derek Fujio</au><aucorp>Apple Computer, Inc</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method and apparatus for forming and dispatching instruction groups based on priority comparisons</title><date>2006-09-26</date><risdate>2006</risdate><abstract>Methods and apparatuses for dispatching instructions executed by at least one functional unit of a data processor, each one of the instructions having a corresponding priority number, in a data processing system having at least one host processor with host processor cache and host memory are described herein. In one aspect of the invention, an exemplary method includes receiving a next instruction from an instruction stream, examining a current instruction group to determine if the current instruction group is completed, adding the next instruction to the current instruction group if the current instruction group is not completed, and dispatching the current instruction group if the current instruction group is completed.</abstract><oa>free_for_read</oa></addata></record>
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title Method and apparatus for forming and dispatching instruction groups based on priority comparisons
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-10T09%3A33%3A41IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Trivedi,%20Sushma%20Shrikant&rft.aucorp=Apple%20Computer,%20Inc&rft.date=2006-09-26&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E07114058%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true