Method and system for embedding a first clock signal phase within a second signal

Method and system for embedding a first clock signal phase within a second signal

A technique for embedding a first clock phase within a second signal is described. In one embodiment, the invention comprises a method of embedding a phase of a first signal within a second signal comprising the steps of monitoring a first signal for a frame event, responsive to detection of a frame...

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Hauptverfasser: Bond, John H, Gammenthaler, Jr, Robert S, McKinley, James C
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Sprache:eng
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creator Bond, John H
Gammenthaler, Jr, Robert S
McKinley, James C
description A technique for embedding a first clock phase within a second signal is described. In one embodiment, the invention comprises a method of embedding a phase of a first signal within a second signal comprising the steps of monitoring a first signal for a frame event, responsive to detection of a frame event in the first clock signal, determining a position of the frame event relative to a current segment of a second signal, and embedding in the current segment of the second signal a value representative of the relative position of the detected frame event.
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In one embodiment, the invention comprises a method of embedding a phase of a first signal within a second signal comprising the steps of monitoring a first signal for a frame event, responsive to detection of a frame event in the first clock signal, determining a position of the frame event relative to a current segment of a second signal, and embedding in the current segment of the second signal a value representative of the relative position of the detected frame event.</description><language>eng</language><creationdate>2006</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7079553$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,780,802,885,64028</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7079553$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Bond, John H</creatorcontrib><creatorcontrib>Gammenthaler, Jr, Robert S</creatorcontrib><creatorcontrib>McKinley, James C</creatorcontrib><creatorcontrib>Alcatel</creatorcontrib><title>Method and system for embedding a first clock signal phase within a second signal</title><description>A technique for embedding a first clock phase within a second signal is described. In one embodiment, the invention comprises a method of embedding a phase of a first signal within a second signal comprising the steps of monitoring a first signal for a frame event, responsive to detection of a frame event in the first clock signal, determining a position of the frame event relative to a current segment of a second signal, and embedding in the current segment of the second signal a value representative of the relative position of the detected frame event.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2006</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNqNizsKwkAQQLexEPUOcwEhEEKwFoONhWAv4-7sBzezYWdEvL1GPIDVK957S3M-kcbiANmBvERpBF8q0Hgj5xIHQPCpioLNxd5BUmDMMEUUgmfSmPhTCNky_1-5NguPWWjz48rAcLjsj9uHTKjEKtdQcUbTN_2u69r2j-QNRBo3_w</recordid><startdate>20060718</startdate><enddate>20060718</enddate><creator>Bond, John H</creator><creator>Gammenthaler, Jr, Robert S</creator><creator>McKinley, James C</creator><scope>EFH</scope></search><sort><creationdate>20060718</creationdate><title>Method and system for embedding a first clock signal phase within a second signal</title><author>Bond, John H ; Gammenthaler, Jr, Robert S ; McKinley, James C</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_070795533</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2006</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Bond, John H</creatorcontrib><creatorcontrib>Gammenthaler, Jr, Robert S</creatorcontrib><creatorcontrib>McKinley, James C</creatorcontrib><creatorcontrib>Alcatel</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Bond, John H</au><au>Gammenthaler, Jr, Robert S</au><au>McKinley, James C</au><aucorp>Alcatel</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method and system for embedding a first clock signal phase within a second signal</title><date>2006-07-18</date><risdate>2006</risdate><abstract>A technique for embedding a first clock phase within a second signal is described. In one embodiment, the invention comprises a method of embedding a phase of a first signal within a second signal comprising the steps of monitoring a first signal for a frame event, responsive to detection of a frame event in the first clock signal, determining a position of the frame event relative to a current segment of a second signal, and embedding in the current segment of the second signal a value representative of the relative position of the detected frame event.</abstract><oa>free_for_read</oa></addata></record>
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title Method and system for embedding a first clock signal phase within a second signal
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