Method for manufacturing a MOS transistor having reduced 1/f noise

14 2The present invention provides, in one embodiment, a method of reducing 1/f noise in a metal oxide semiconductor (MOS) device. The method comprises forming an oxide layer on a silicon substrate and depositing a polysilicon layer on the oxide layer. The method further includes implanting a fluorine dopant into the polysilicon layer at an implant dose of at least about 4×10atoms/cm. The polysilicon layer is thermally annealed such that a portion of the fluorine dopant is diffused into the oxide layer to thereby reduce a 1/f noise of the MOS device. Other embodiments of the provide a MOS device manufactured by the above-described method and a method of manufacturing an integrated circuit that includes the above-described method.