Semiconductor differential interconnect

Semiconductor differential interconnect

An interconnect is described including a semiconductor substrate having opposing surfaces, including first and second insulated conductors for transmitting signals. A third conductor substantially surrounds and is electrically insulated from the first and second insulated conductors. Capacitance bet...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: Van Lydegraf, Curt N
Format: Patent
Sprache:eng
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Van Lydegraf, Curt N
description An interconnect is described including a semiconductor substrate having opposing surfaces, including first and second insulated conductors for transmitting signals. A third conductor substantially surrounds and is electrically insulated from the first and second insulated conductors. Capacitance between the first insulated conductor and the third conductor is substantially equivalent to capacitance between the second insulated conductor and the third conductor. The first insulated conductor and the second insulated conductor are disposed between the opposing surfaces of the semiconductor substrate.
format Patent
fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_06967393</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>06967393</sourcerecordid><originalsourceid>FETCH-uspatents_grants_069673933</originalsourceid><addsrcrecordid>eNrjZFAPTs3NTM7PSylNLskvUkjJTEtLLUrNK8lMzFHIzCtJLQLK5aUml_AwsKYl5hSn8kJpbgYFN9cQZw_d0uKCxBKghuL49KJEEGVgZmlmbmxpbEyEEgDNACmq</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor differential interconnect</title><source>USPTO Issued Patents</source><creator>Van Lydegraf, Curt N</creator><creatorcontrib>Van Lydegraf, Curt N ; Hewlett-Packard Development Company, L.P</creatorcontrib><description>An interconnect is described including a semiconductor substrate having opposing surfaces, including first and second insulated conductors for transmitting signals. A third conductor substantially surrounds and is electrically insulated from the first and second insulated conductors. Capacitance between the first insulated conductor and the third conductor is substantially equivalent to capacitance between the second insulated conductor and the third conductor. The first insulated conductor and the second insulated conductor are disposed between the opposing surfaces of the semiconductor substrate.</description><language>eng</language><creationdate>2005</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6967393$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,777,799,882,64018</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6967393$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Van Lydegraf, Curt N</creatorcontrib><creatorcontrib>Hewlett-Packard Development Company, L.P</creatorcontrib><title>Semiconductor differential interconnect</title><description>An interconnect is described including a semiconductor substrate having opposing surfaces, including first and second insulated conductors for transmitting signals. A third conductor substantially surrounds and is electrically insulated from the first and second insulated conductors. Capacitance between the first insulated conductor and the third conductor is substantially equivalent to capacitance between the second insulated conductor and the third conductor. The first insulated conductor and the second insulated conductor are disposed between the opposing surfaces of the semiconductor substrate.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2005</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZFAPTs3NTM7PSylNLskvUkjJTEtLLUrNK8lMzFHIzCtJLQLK5aUml_AwsKYl5hSn8kJpbgYFN9cQZw_d0uKCxBKghuL49KJEEGVgZmlmbmxpbEyEEgDNACmq</recordid><startdate>20051122</startdate><enddate>20051122</enddate><creator>Van Lydegraf, Curt N</creator><scope>EFH</scope></search><sort><creationdate>20051122</creationdate><title>Semiconductor differential interconnect</title><author>Van Lydegraf, Curt N</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_069673933</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2005</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Van Lydegraf, Curt N</creatorcontrib><creatorcontrib>Hewlett-Packard Development Company, L.P</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Van Lydegraf, Curt N</au><aucorp>Hewlett-Packard Development Company, L.P</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor differential interconnect</title><date>2005-11-22</date><risdate>2005</risdate><abstract>An interconnect is described including a semiconductor substrate having opposing surfaces, including first and second insulated conductors for transmitting signals. A third conductor substantially surrounds and is electrically insulated from the first and second insulated conductors. Capacitance between the first insulated conductor and the third conductor is substantially equivalent to capacitance between the second insulated conductor and the third conductor. The first insulated conductor and the second insulated conductor are disposed between the opposing surfaces of the semiconductor substrate.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_uspatents_grants_06967393
source USPTO Issued Patents
title Semiconductor differential interconnect
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-18T01%3A37%3A29IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Van%20Lydegraf,%20Curt%20N&rft.aucorp=Hewlett-Packard%20Development%20Company,%20L.P&rft.date=2005-11-22&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E06967393%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true