Integrated circuit including active components and at least one passive component associated fabrication method
There is provided an integrated circuit having active components including junctions formed in a monocrystalline substrate doped locally, and at least one passive component situated above the active components. The integrated circuit includes a first insulating layer separating the active components...
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creator | Mallardeau, Catherine Mazoyer, Pascale Piazza, Marc |
description | There is provided an integrated circuit having active components including junctions formed in a monocrystalline substrate doped locally, and at least one passive component situated above the active components. The integrated circuit includes a first insulating layer separating the active components and abase of the passive component, and a metal terminal for electrically connecting the passive component with at least one of the active components. The metal terminal is formed in the thickness of the first insulating layer and has a contact surface that projects from the limits of a junction of the one active component. In a preferred embodiment, the passive component is a capacitor. Also provided is a method of fabricating an integrated circuit that includes MOS transistors and an onboard memory plane of DRAM cells in a matrix. |
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The integrated circuit includes a first insulating layer separating the active components and abase of the passive component, and a metal terminal for electrically connecting the passive component with at least one of the active components. The metal terminal is formed in the thickness of the first insulating layer and has a contact surface that projects from the limits of a junction of the one active component. In a preferred embodiment, the passive component is a capacitor. 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The integrated circuit includes a first insulating layer separating the active components and abase of the passive component, and a metal terminal for electrically connecting the passive component with at least one of the active components. The metal terminal is formed in the thickness of the first insulating layer and has a contact surface that projects from the limits of a junction of the one active component. In a preferred embodiment, the passive component is a capacitor. Also provided is a method of fabricating an integrated circuit that includes MOS transistors and an onboard memory plane of DRAM cells in a matrix.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2005</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNqNjj0KAjEQhdNYiHqHuYCwIBGtRdHeXsbJ7DqwOwnJxPMbxcbO6oPH-5u7eFHjIaNxAJJMVQxEaaxBdAAkkycDxSlFZbUCqAHQYGQsBk2DhKX8eKAJkeTT2OM9C6FJVJjYHjEs3azHsfDqy4WD0_F6OK9rSS3SJm7tzRvddu93vvObPywvIiZEvQ</recordid><startdate>20051025</startdate><enddate>20051025</enddate><creator>Mallardeau, Catherine</creator><creator>Mazoyer, Pascale</creator><creator>Piazza, Marc</creator><scope>EFH</scope></search><sort><creationdate>20051025</creationdate><title>Integrated circuit including active components and at least one passive component associated fabrication method</title><author>Mallardeau, Catherine ; Mazoyer, Pascale ; Piazza, Marc</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_069585053</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2005</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Mallardeau, Catherine</creatorcontrib><creatorcontrib>Mazoyer, Pascale</creatorcontrib><creatorcontrib>Piazza, Marc</creatorcontrib><creatorcontrib>STMicroelectronics S.A</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Mallardeau, Catherine</au><au>Mazoyer, Pascale</au><au>Piazza, Marc</au><aucorp>STMicroelectronics S.A</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Integrated circuit including active components and at least one passive component associated fabrication method</title><date>2005-10-25</date><risdate>2005</risdate><abstract>There is provided an integrated circuit having active components including junctions formed in a monocrystalline substrate doped locally, and at least one passive component situated above the active components. The integrated circuit includes a first insulating layer separating the active components and abase of the passive component, and a metal terminal for electrically connecting the passive component with at least one of the active components. The metal terminal is formed in the thickness of the first insulating layer and has a contact surface that projects from the limits of a junction of the one active component. In a preferred embodiment, the passive component is a capacitor. Also provided is a method of fabricating an integrated circuit that includes MOS transistors and an onboard memory plane of DRAM cells in a matrix.</abstract><oa>free_for_read</oa></addata></record> |
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title | Integrated circuit including active components and at least one passive component associated fabrication method |
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