Memory architecture for a multiple format video signal processor

Memory architecture for a multiple format video signal processor

A video decoder transcodes video data from various input formats to a predetermined output format. Input data may be standard definition data or MPEG2 compressed data. Standard definition data are rearranged into block format to be compatible with the decoder's single display processor. The dis...

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Hauptverfasser: Christopher, Todd, Canfield, Barth Alan, Patton, Steven Wayne
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creator Christopher, Todd
Canfield, Barth Alan
Patton, Steven Wayne
description A video decoder transcodes video data from various input formats to a predetermined output format. Input data may be standard definition data or MPEG2 compressed data. Standard definition data are rearranged into block format to be compatible with the decoder's single display processor. The display processor selectively processes and conveys either MPEG2 format data or non-MPEG2 format data to a display device. A block based frame memory stores MPEG2 and non-MPEG2 pixel block data, as well as standard definition data in raster line format during processing.
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title Memory architecture for a multiple format video signal processor
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