Ball grid array resistor network having a ground plane

Ball grid array resistor network having a ground plane

A ball grid array resistor network that has a ground plane to reduce noise and improve signal integrity. The ball grid array resistor network includes a substrate having a first and a second surface and vias that extending through the substrate between the first and second surfaces. Resistors are lo...

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Hauptverfasser: Cooper, Richard, Tu, Yinggang
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Sprache:eng
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creator Cooper, Richard
Tu, Yinggang
description A ball grid array resistor network that has a ground plane to reduce noise and improve signal integrity. The ball grid array resistor network includes a substrate having a first and a second surface and vias that extending through the substrate between the first and second surfaces. Resistors are located on the first surface between the vias. Conductors are located over the vias and are electrically connected to ends of the resistors. A cover coat covers the conductors and resistors. A ground plane is located on the second surface. An insulating layer is located over the ground plane. Ball pads are located over the vias. The ball pads are electrically connected to the vias. Solder spheres are attached to the ball pads.
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fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_06882266</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>06882266</sourcerecordid><originalsourceid>FETCH-uspatents_grants_068822663</originalsourceid><addsrcrecordid>eNrjZDBzSszJUUgvykxRSCwqSqxUKEotziwuyS9SyEstKc8vylbISCzLzEtXSAQqyi_NS1EoyEnMS-VhYE1LzClO5YXS3AwKbq4hzh66pcUFiSWpeSXF8elFiSDKwMzCwsjIzMyYCCUAW9suWQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Ball grid array resistor network having a ground plane</title><source>USPTO Issued Patents</source><creator>Cooper, Richard ; Tu, Yinggang</creator><creatorcontrib>Cooper, Richard ; Tu, Yinggang ; CTS Corporation</creatorcontrib><description>A ball grid array resistor network that has a ground plane to reduce noise and improve signal integrity. The ball grid array resistor network includes a substrate having a first and a second surface and vias that extending through the substrate between the first and second surfaces. Resistors are located on the first surface between the vias. Conductors are located over the vias and are electrically connected to ends of the resistors. A cover coat covers the conductors and resistors. A ground plane is located on the second surface. An insulating layer is located over the ground plane. Ball pads are located over the vias. The ball pads are electrically connected to the vias. Solder spheres are attached to the ball pads.</description><language>eng</language><creationdate>2005</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6882266$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,780,802,885,64039</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6882266$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Cooper, Richard</creatorcontrib><creatorcontrib>Tu, Yinggang</creatorcontrib><creatorcontrib>CTS Corporation</creatorcontrib><title>Ball grid array resistor network having a ground plane</title><description>A ball grid array resistor network that has a ground plane to reduce noise and improve signal integrity. The ball grid array resistor network includes a substrate having a first and a second surface and vias that extending through the substrate between the first and second surfaces. Resistors are located on the first surface between the vias. Conductors are located over the vias and are electrically connected to ends of the resistors. A cover coat covers the conductors and resistors. A ground plane is located on the second surface. An insulating layer is located over the ground plane. Ball pads are located over the vias. The ball pads are electrically connected to the vias. Solder spheres are attached to the ball pads.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2005</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZDBzSszJUUgvykxRSCwqSqxUKEotziwuyS9SyEstKc8vylbISCzLzEtXSAQqyi_NS1EoyEnMS-VhYE1LzClO5YXS3AwKbq4hzh66pcUFiSWpeSXF8elFiSDKwMzCwsjIzMyYCCUAW9suWQ</recordid><startdate>20050419</startdate><enddate>20050419</enddate><creator>Cooper, Richard</creator><creator>Tu, Yinggang</creator><scope>EFH</scope></search><sort><creationdate>20050419</creationdate><title>Ball grid array resistor network having a ground plane</title><author>Cooper, Richard ; Tu, Yinggang</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_068822663</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2005</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Cooper, Richard</creatorcontrib><creatorcontrib>Tu, Yinggang</creatorcontrib><creatorcontrib>CTS Corporation</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Cooper, Richard</au><au>Tu, Yinggang</au><aucorp>CTS Corporation</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Ball grid array resistor network having a ground plane</title><date>2005-04-19</date><risdate>2005</risdate><abstract>A ball grid array resistor network that has a ground plane to reduce noise and improve signal integrity. The ball grid array resistor network includes a substrate having a first and a second surface and vias that extending through the substrate between the first and second surfaces. Resistors are located on the first surface between the vias. Conductors are located over the vias and are electrically connected to ends of the resistors. A cover coat covers the conductors and resistors. A ground plane is located on the second surface. An insulating layer is located over the ground plane. Ball pads are located over the vias. The ball pads are electrically connected to the vias. Solder spheres are attached to the ball pads.</abstract><oa>free_for_read</oa></addata></record>
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title Ball grid array resistor network having a ground plane
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-05T07%3A48%3A29IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Cooper,%20Richard&rft.aucorp=CTS%20Corporation&rft.date=2005-04-19&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E06882266%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true