Self-aligned array contact for memory cells

A method of forming bitlines for a memory cell array of an integrated circuit and conductive lines interconnecting transistors of an external region outside of the memory cell array is provided. The method includes patterning troughs in a dielectric region covering the memory cell array according to...

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Bibliographische Detailangaben

Hauptverfasser:	Divakaruni, Rama, Faltermeier, Johnathan E, Maldei, Michael, Strane, Jay
Format:	Patent
Sprache:	eng
Online-Zugang:	Volltext bestellen
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