Virtual reassembly system and method of operation thereof

Virtual reassembly system and method of operation thereof

A virtual reassembly system for use with a fast pattern processor and a method of operating the same. In one embodiment, the virtual reassembly system includes a first pass subsystem configured to convert a packet of a protocol data unit into at least one processing block, queue the at least one pro...

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Hauptverfasser: Bennett, Victor A, Zsohar, Leslie, Lawson, Shannon E, McGee, Sean W, Sonnier, David P, Kramer, David B
Format: Patent
Sprache:eng
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creator Bennett, Victor A
Zsohar, Leslie
Lawson, Shannon E
McGee, Sean W
Sonnier, David P
Kramer, David B
description A virtual reassembly system for use with a fast pattern processor and a method of operating the same. In one embodiment, the virtual reassembly system includes a first pass subsystem configured to convert a packet of a protocol data unit into at least one processing block, queue the at least one processing block based upon a header of the packet and determine if the packet is a last packet of the protocol data unit. The virtual reassembly system further includes a second pass subsystem configured to virtually reassemble the protocol data unit by retrieving the at least one processing block based upon the queue.
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title Virtual reassembly system and method of operation thereof
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