Backplane, printed wiring board, and/or multi-chip module-level optical interconnect layer having embedded air-gap technologies and methods of fabrication
The present invention is generally related to backplane, printed wiring board, and multi-chip module devices and, more particularly, embodiments of the present invention are related to such devices having an optical interconnect layer or layers and methods of fabrication thereof. Optical interconnec...
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creator | Mule′, Tony Meindl, James D Kohl, Paul Schultz, Stephen M Gaylord, Thomas K Glytsis, Elias N Villalaz, Ricardo Bakir, Muhannad Reed, Hollie |
description | The present invention is generally related to backplane, printed wiring board, and multi-chip module devices and, more particularly, embodiments of the present invention are related to such devices having an optical interconnect layer or layers and methods of fabrication thereof.
Optical interconnect layers and methods of fabrication thereof are described. In addition, the optical interconnect layers integrated into devices such as backplane (BP), printed wiring board (PWB), and multi-chip module (MCM) level devices are described. A representative optical interconnect layer includes a first cladding layer, a second cladding layer, one or more waveguides having a waveguide core and an air-gap cladding layer engaging a portion of waveguide core, wherein the first cladding layer and the second cladding layer engage the waveguide. |
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Optical interconnect layers and methods of fabrication thereof are described. In addition, the optical interconnect layers integrated into devices such as backplane (BP), printed wiring board (PWB), and multi-chip module (MCM) level devices are described. A representative optical interconnect layer includes a first cladding layer, a second cladding layer, one or more waveguides having a waveguide core and an air-gap cladding layer engaging a portion of waveguide core, wherein the first cladding layer and the second cladding layer engage the waveguide.</description><language>eng</language><creationdate>2004</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6788867$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,780,802,885,64038</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6788867$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Mule′, Tony</creatorcontrib><creatorcontrib>Meindl, James D</creatorcontrib><creatorcontrib>Kohl, Paul</creatorcontrib><creatorcontrib>Schultz, Stephen M</creatorcontrib><creatorcontrib>Gaylord, Thomas K</creatorcontrib><creatorcontrib>Glytsis, Elias N</creatorcontrib><creatorcontrib>Villalaz, Ricardo</creatorcontrib><creatorcontrib>Bakir, Muhannad</creatorcontrib><creatorcontrib>Reed, Hollie</creatorcontrib><creatorcontrib>Georgia Tech Research Corp</creatorcontrib><title>Backplane, printed wiring board, and/or multi-chip module-level optical interconnect layer having embedded air-gap technologies and methods of fabrication</title><description>The present invention is generally related to backplane, printed wiring board, and multi-chip module devices and, more particularly, embodiments of the present invention are related to such devices having an optical interconnect layer or layers and methods of fabrication thereof.
Optical interconnect layers and methods of fabrication thereof are described. In addition, the optical interconnect layers integrated into devices such as backplane (BP), printed wiring board (PWB), and multi-chip module (MCM) level devices are described. A representative optical interconnect layer includes a first cladding layer, a second cladding layer, one or more waveguides having a waveguide core and an air-gap cladding layer engaging a portion of waveguide core, wherein the first cladding layer and the second cladding layer engage the waveguide.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2004</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNqNzEEOgjAQBVA2Lox6hzkARBMTYK3ReAD3ZmgHaBw6TTtgvIqnFRIP4Or_xf9vnX1OaJ6B0VMOITqvZOHl5tJBIxhtDujtXiIMI6srTO8CDGJHpoJpIgYJ6gwyLNdoxHsyCoxvitDjtDg0NGTt7KKLRYcBlEzvhaVzlBYeBtJebAJpocUmzp468dts1SIn2v1yk8H1cj_fijEFVPKaHl3EJQ5lVdd1WR3_mHwBbrRUAw</recordid><startdate>20040907</startdate><enddate>20040907</enddate><creator>Mule′, Tony</creator><creator>Meindl, James D</creator><creator>Kohl, Paul</creator><creator>Schultz, Stephen M</creator><creator>Gaylord, Thomas K</creator><creator>Glytsis, Elias N</creator><creator>Villalaz, Ricardo</creator><creator>Bakir, Muhannad</creator><creator>Reed, Hollie</creator><scope>EFH</scope></search><sort><creationdate>20040907</creationdate><title>Backplane, printed wiring board, and/or multi-chip module-level optical interconnect layer having embedded air-gap technologies and methods of fabrication</title><author>Mule′, Tony ; Meindl, James D ; Kohl, Paul ; Schultz, Stephen M ; Gaylord, Thomas K ; Glytsis, Elias N ; Villalaz, Ricardo ; Bakir, Muhannad ; Reed, Hollie</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_067888673</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2004</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Mule′, Tony</creatorcontrib><creatorcontrib>Meindl, James D</creatorcontrib><creatorcontrib>Kohl, Paul</creatorcontrib><creatorcontrib>Schultz, Stephen M</creatorcontrib><creatorcontrib>Gaylord, Thomas K</creatorcontrib><creatorcontrib>Glytsis, Elias N</creatorcontrib><creatorcontrib>Villalaz, Ricardo</creatorcontrib><creatorcontrib>Bakir, Muhannad</creatorcontrib><creatorcontrib>Reed, Hollie</creatorcontrib><creatorcontrib>Georgia Tech Research Corp</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Mule′, Tony</au><au>Meindl, James D</au><au>Kohl, Paul</au><au>Schultz, Stephen M</au><au>Gaylord, Thomas K</au><au>Glytsis, Elias N</au><au>Villalaz, Ricardo</au><au>Bakir, Muhannad</au><au>Reed, Hollie</au><aucorp>Georgia Tech Research Corp</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Backplane, printed wiring board, and/or multi-chip module-level optical interconnect layer having embedded air-gap technologies and methods of fabrication</title><date>2004-09-07</date><risdate>2004</risdate><abstract>The present invention is generally related to backplane, printed wiring board, and multi-chip module devices and, more particularly, embodiments of the present invention are related to such devices having an optical interconnect layer or layers and methods of fabrication thereof.
Optical interconnect layers and methods of fabrication thereof are described. In addition, the optical interconnect layers integrated into devices such as backplane (BP), printed wiring board (PWB), and multi-chip module (MCM) level devices are described. A representative optical interconnect layer includes a first cladding layer, a second cladding layer, one or more waveguides having a waveguide core and an air-gap cladding layer engaging a portion of waveguide core, wherein the first cladding layer and the second cladding layer engage the waveguide.</abstract><oa>free_for_read</oa></addata></record> |
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title | Backplane, printed wiring board, and/or multi-chip module-level optical interconnect layer having embedded air-gap technologies and methods of fabrication |
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