Electronic structures with reduced capacitance
This invention relates to passive components integrated on an integrated circuit chip, an integrated circuit carrier, and a circuit board. An apparatus and method is described incorporating one or more layers of SiCOH and one or more layers of patterned conductors in an integrated circuit chip. The...
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creator | Gates, Stephen McConnell Grill, Alfred |
description | This invention relates to passive components integrated on an integrated circuit chip, an integrated circuit carrier, and a circuit board.
An apparatus and method is described incorporating one or more layers of SiCOH and one or more layers of patterned conductors in an integrated circuit chip. The invention overcomes the problem of capacitance by lowering the k of the delectric and overcomes the problem of breakdown voltage and the leakage curent by tailoring the composition of SiCOH. |
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fullrecord | <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_06737727</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>06737727</sourcerecordid><originalsourceid>FETCH-uspatents_grants_067377273</originalsourceid><addsrcrecordid>eNrjZNBzzUlNLinKz8tMViguKSpNLiktSi1WKM8syVAoSk0pTU5NUUhOLEhMzixJzEtO5WFgTUvMKU7lhdLcDApuriHOHrqlxQWJJal5JcXx6UWJIMrAzNzY3NzI3JgIJQAM6ywB</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Electronic structures with reduced capacitance</title><source>USPTO Issued Patents</source><creator>Gates, Stephen McConnell ; Grill, Alfred</creator><creatorcontrib>Gates, Stephen McConnell ; Grill, Alfred ; International Business Machines Corporation</creatorcontrib><description>This invention relates to passive components integrated on an integrated circuit chip, an integrated circuit carrier, and a circuit board.
An apparatus and method is described incorporating one or more layers of SiCOH and one or more layers of patterned conductors in an integrated circuit chip. The invention overcomes the problem of capacitance by lowering the k of the delectric and overcomes the problem of breakdown voltage and the leakage curent by tailoring the composition of SiCOH.</description><language>eng</language><creationdate>2004</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6737727$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,780,802,885,64039</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6737727$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Gates, Stephen McConnell</creatorcontrib><creatorcontrib>Grill, Alfred</creatorcontrib><creatorcontrib>International Business Machines Corporation</creatorcontrib><title>Electronic structures with reduced capacitance</title><description>This invention relates to passive components integrated on an integrated circuit chip, an integrated circuit carrier, and a circuit board.
An apparatus and method is described incorporating one or more layers of SiCOH and one or more layers of patterned conductors in an integrated circuit chip. The invention overcomes the problem of capacitance by lowering the k of the delectric and overcomes the problem of breakdown voltage and the leakage curent by tailoring the composition of SiCOH.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2004</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZNBzzUlNLinKz8tMViguKSpNLiktSi1WKM8syVAoSk0pTU5NUUhOLEhMzixJzEtO5WFgTUvMKU7lhdLcDApuriHOHrqlxQWJJal5JcXx6UWJIMrAzNzY3NzI3JgIJQAM6ywB</recordid><startdate>20040518</startdate><enddate>20040518</enddate><creator>Gates, Stephen McConnell</creator><creator>Grill, Alfred</creator><scope>EFH</scope></search><sort><creationdate>20040518</creationdate><title>Electronic structures with reduced capacitance</title><author>Gates, Stephen McConnell ; Grill, Alfred</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_067377273</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2004</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Gates, Stephen McConnell</creatorcontrib><creatorcontrib>Grill, Alfred</creatorcontrib><creatorcontrib>International Business Machines Corporation</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Gates, Stephen McConnell</au><au>Grill, Alfred</au><aucorp>International Business Machines Corporation</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Electronic structures with reduced capacitance</title><date>2004-05-18</date><risdate>2004</risdate><abstract>This invention relates to passive components integrated on an integrated circuit chip, an integrated circuit carrier, and a circuit board.
An apparatus and method is described incorporating one or more layers of SiCOH and one or more layers of patterned conductors in an integrated circuit chip. The invention overcomes the problem of capacitance by lowering the k of the delectric and overcomes the problem of breakdown voltage and the leakage curent by tailoring the composition of SiCOH.</abstract><oa>free_for_read</oa></addata></record> |
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title | Electronic structures with reduced capacitance |
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