Microelectronic substrate with integrated devices
1. Field of the Invention A microelectronic substrate including at least one microelectronic die disposed within an opening in a microelectronic substrate core, wherein an encapsulation material is disposed within portions of the opening not occupied by the microelectronic dice, or a plurality micro...
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creator | Vu, Quat T Li, Jian Towle, Steven |
description | 1. Field of the Invention
A microelectronic substrate including at least one microelectronic die disposed within an opening in a microelectronic substrate core, wherein an encapsulation material is disposed within portions of the opening not occupied by the microelectronic dice, or a plurality microelectronic dice encapsulated without the microelectronic substrate core. Interconnection layers of dielectric materials and conductive traces are then fabricated on the microelectronic die, the encapsulation material, and the microelectronic substrate core (if present) to form the microelectronic substrate. |
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A microelectronic substrate including at least one microelectronic die disposed within an opening in a microelectronic substrate core, wherein an encapsulation material is disposed within portions of the opening not occupied by the microelectronic dice, or a plurality microelectronic dice encapsulated without the microelectronic substrate core. Interconnection layers of dielectric materials and conductive traces are then fabricated on the microelectronic die, the encapsulation material, and the microelectronic substrate core (if present) to form the microelectronic substrate.</description><language>eng</language><creationdate>2004</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6734534$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,780,802,885,64038</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6734534$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Vu, Quat T</creatorcontrib><creatorcontrib>Li, Jian</creatorcontrib><creatorcontrib>Towle, Steven</creatorcontrib><creatorcontrib>Intel Corporation</creatorcontrib><title>Microelectronic substrate with integrated devices</title><description>1. Field of the Invention
A microelectronic substrate including at least one microelectronic die disposed within an opening in a microelectronic substrate core, wherein an encapsulation material is disposed within portions of the opening not occupied by the microelectronic dice, or a plurality microelectronic dice encapsulated without the microelectronic substrate core. Interconnection layers of dielectric materials and conductive traces are then fabricated on the microelectronic die, the encapsulation material, and the microelectronic substrate core (if present) to form the microelectronic substrate.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2004</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZDD0zUwuyk_NSU0uKcrPy0xWKC5NKi4pSixJVSjPLMlQyMwrSU0HcVMUUlLLMpNTi3kYWNMSc4pTeaE0N4OCm2uIs4duaXEBUF1eSXE8UAOIMjAzNzYxNTYxJkIJAL1vLUs</recordid><startdate>20040511</startdate><enddate>20040511</enddate><creator>Vu, Quat T</creator><creator>Li, Jian</creator><creator>Towle, Steven</creator><scope>EFH</scope></search><sort><creationdate>20040511</creationdate><title>Microelectronic substrate with integrated devices</title><author>Vu, Quat T ; Li, Jian ; Towle, Steven</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_067345343</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2004</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Vu, Quat T</creatorcontrib><creatorcontrib>Li, Jian</creatorcontrib><creatorcontrib>Towle, Steven</creatorcontrib><creatorcontrib>Intel Corporation</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Vu, Quat T</au><au>Li, Jian</au><au>Towle, Steven</au><aucorp>Intel Corporation</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Microelectronic substrate with integrated devices</title><date>2004-05-11</date><risdate>2004</risdate><abstract>1. Field of the Invention
A microelectronic substrate including at least one microelectronic die disposed within an opening in a microelectronic substrate core, wherein an encapsulation material is disposed within portions of the opening not occupied by the microelectronic dice, or a plurality microelectronic dice encapsulated without the microelectronic substrate core. Interconnection layers of dielectric materials and conductive traces are then fabricated on the microelectronic die, the encapsulation material, and the microelectronic substrate core (if present) to form the microelectronic substrate.</abstract><oa>free_for_read</oa></addata></record> |
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recordid | cdi_uspatents_grants_06734534 |
source | USPTO Issued Patents |
title | Microelectronic substrate with integrated devices |
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