Delay line trim unit having consistent performance under varying process and temperature conditions

The invention relates to delay lines in integrated circuits (ICs). More particularly, the invention relates to a delay line trim unit that exhibits consistent performance under varying process and temperature conditions, such trim units being particularly useful in the design of delay-lock loop circ...

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Bibliographische Detailangaben

Hauptverfasser:	Oh, Kwansuhk, Pang, Raymond C
Format:	Patent
Sprache:	eng
Online-Zugang:	Volltext bestellen
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