Electronic component having a semiconductor chip
The invention relates to an electronic component having a semiconductor chip comprising a multi-layered coating that includes at least one interconnect layer, one insulation layer, and one planarization layer. An electronic component includes a semiconductor chip and/or a test structure. The semicon...
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creator | Alpern, Peter Herzog, Thomas Sauert, Wolfgang Schauer, Heinz Tilgner, Rainer |
description | The invention relates to an electronic component having a semiconductor chip comprising a multi-layered coating that includes at least one interconnect layer, one insulation layer, and one planarization layer.
An electronic component includes a semiconductor chip and/or a test structure. The semiconductor chip includes a multi-layer coating having at least one interconnect layer, at least one insulation layer, and at least one planarization layer. A method of producing the component is also disclosed. Embedded adhesion regions are provided in the planarization layer, whereby the adhesion regions provide adhesion surfaces to the adjacent insulation layers. |
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An electronic component includes a semiconductor chip and/or a test structure. The semiconductor chip includes a multi-layer coating having at least one interconnect layer, at least one insulation layer, and at least one planarization layer. A method of producing the component is also disclosed. Embedded adhesion regions are provided in the planarization layer, whereby the adhesion regions provide adhesion surfaces to the adjacent insulation layers.</description><language>eng</language><creationdate>2003</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6653732$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,780,802,885,64039</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6653732$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Alpern, Peter</creatorcontrib><creatorcontrib>Herzog, Thomas</creatorcontrib><creatorcontrib>Sauert, Wolfgang</creatorcontrib><creatorcontrib>Schauer, Heinz</creatorcontrib><creatorcontrib>Tilgner, Rainer</creatorcontrib><creatorcontrib>Infineon Technologies AG</creatorcontrib><title>Electronic component having a semiconductor chip</title><description>The invention relates to an electronic component having a semiconductor chip comprising a multi-layered coating that includes at least one interconnect layer, one insulation layer, and one planarization layer.
An electronic component includes a semiconductor chip and/or a test structure. The semiconductor chip includes a multi-layer coating having at least one interconnect layer, at least one insulation layer, and at least one planarization layer. A method of producing the component is also disclosed. Embedded adhesion regions are provided in the planarization layer, whereby the adhesion regions provide adhesion surfaces to the adjacent insulation layers.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2003</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZDBwzUlNLinKz8tMVkjOzy3Iz0vNK1HISCzLzEtXSFQoTs3NTM7PSylNLskvUkjOyCzgYWBNS8wpTuWF0twMCm6uIc4euqXFBYklQM3F8elFiSDKwMzM1Njc2MiYCCUAWUwsgQ</recordid><startdate>20031125</startdate><enddate>20031125</enddate><creator>Alpern, Peter</creator><creator>Herzog, Thomas</creator><creator>Sauert, Wolfgang</creator><creator>Schauer, Heinz</creator><creator>Tilgner, Rainer</creator><scope>EFH</scope></search><sort><creationdate>20031125</creationdate><title>Electronic component having a semiconductor chip</title><author>Alpern, Peter ; Herzog, Thomas ; Sauert, Wolfgang ; Schauer, Heinz ; Tilgner, Rainer</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_066537323</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2003</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Alpern, Peter</creatorcontrib><creatorcontrib>Herzog, Thomas</creatorcontrib><creatorcontrib>Sauert, Wolfgang</creatorcontrib><creatorcontrib>Schauer, Heinz</creatorcontrib><creatorcontrib>Tilgner, Rainer</creatorcontrib><creatorcontrib>Infineon Technologies AG</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Alpern, Peter</au><au>Herzog, Thomas</au><au>Sauert, Wolfgang</au><au>Schauer, Heinz</au><au>Tilgner, Rainer</au><aucorp>Infineon Technologies AG</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Electronic component having a semiconductor chip</title><date>2003-11-25</date><risdate>2003</risdate><abstract>The invention relates to an electronic component having a semiconductor chip comprising a multi-layered coating that includes at least one interconnect layer, one insulation layer, and one planarization layer.
An electronic component includes a semiconductor chip and/or a test structure. The semiconductor chip includes a multi-layer coating having at least one interconnect layer, at least one insulation layer, and at least one planarization layer. A method of producing the component is also disclosed. Embedded adhesion regions are provided in the planarization layer, whereby the adhesion regions provide adhesion surfaces to the adjacent insulation layers.</abstract><oa>free_for_read</oa></addata></record> |
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title | Electronic component having a semiconductor chip |
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