Apparatus and method for interleaved packet storage

Apparatus and method for interleaved packet storage

The present invention relates generally to network devices with memory to store network packets. An apparatus and method for storage of memory packets with a high aggregate bandwidth is disclosed. An odd-even memory bank structure effectively doubles the memory available for packet storage. A packet...

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Hauptverfasser: Melaragni, William, Ladwig, Geoffrey B, Angle, Richard L
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Sprache:eng
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creator Melaragni, William
Ladwig, Geoffrey B
Angle, Richard L
description The present invention relates generally to network devices with memory to store network packets. An apparatus and method for storage of memory packets with a high aggregate bandwidth is disclosed. An odd-even memory bank structure effectively doubles the memory available for packet storage. A packet memory arbitration scheme aligns access of devices reading and writing into packet memory allowing full-rate access to the packet memory.
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fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_06633576</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>06633576</sourcerecordid><originalsourceid>FETCH-uspatents_grants_066335763</originalsourceid><addsrcrecordid>eNrjZDB2LChILEosKS1WSMxLUchNLcnIT1FIyy9SyMwrSS3KSU0sS01RKEhMzk4tUSguyS9KTE_lYWBNS8wpTuWF0twMCm6uIc4euqXFBYklqXklxfHpRYkgysDMzNjY1NzMmAglANzyLXw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Apparatus and method for interleaved packet storage</title><source>USPTO Issued Patents</source><creator>Melaragni, William ; Ladwig, Geoffrey B ; Angle, Richard L</creator><creatorcontrib>Melaragni, William ; Ladwig, Geoffrey B ; Angle, Richard L</creatorcontrib><description>The present invention relates generally to network devices with memory to store network packets. An apparatus and method for storage of memory packets with a high aggregate bandwidth is disclosed. An odd-even memory bank structure effectively doubles the memory available for packet storage. A packet memory arbitration scheme aligns access of devices reading and writing into packet memory allowing full-rate access to the packet memory.</description><language>eng</language><creationdate>2003</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6633576$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,780,802,885,64037</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6633576$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Melaragni, William</creatorcontrib><creatorcontrib>Ladwig, Geoffrey B</creatorcontrib><creatorcontrib>Angle, Richard L</creatorcontrib><title>Apparatus and method for interleaved packet storage</title><description>The present invention relates generally to network devices with memory to store network packets. An apparatus and method for storage of memory packets with a high aggregate bandwidth is disclosed. An odd-even memory bank structure effectively doubles the memory available for packet storage. A packet memory arbitration scheme aligns access of devices reading and writing into packet memory allowing full-rate access to the packet memory.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2003</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZDB2LChILEosKS1WSMxLUchNLcnIT1FIyy9SyMwrSS3KSU0sS01RKEhMzk4tUSguyS9KTE_lYWBNS8wpTuWF0twMCm6uIc4euqXFBYklqXklxfHpRYkgysDMzNjY1NzMmAglANzyLXw</recordid><startdate>20031014</startdate><enddate>20031014</enddate><creator>Melaragni, William</creator><creator>Ladwig, Geoffrey B</creator><creator>Angle, Richard L</creator><scope>EFH</scope></search><sort><creationdate>20031014</creationdate><title>Apparatus and method for interleaved packet storage</title><author>Melaragni, William ; Ladwig, Geoffrey B ; Angle, Richard L</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_066335763</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2003</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Melaragni, William</creatorcontrib><creatorcontrib>Ladwig, Geoffrey B</creatorcontrib><creatorcontrib>Angle, Richard L</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Melaragni, William</au><au>Ladwig, Geoffrey B</au><au>Angle, Richard L</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Apparatus and method for interleaved packet storage</title><date>2003-10-14</date><risdate>2003</risdate><abstract>The present invention relates generally to network devices with memory to store network packets. An apparatus and method for storage of memory packets with a high aggregate bandwidth is disclosed. An odd-even memory bank structure effectively doubles the memory available for packet storage. A packet memory arbitration scheme aligns access of devices reading and writing into packet memory allowing full-rate access to the packet memory.</abstract><oa>free_for_read</oa></addata></record>
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title Apparatus and method for interleaved packet storage
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-14T04%3A42%3A03IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Melaragni,%20William&rft.date=2003-10-14&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E06633576%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true