Noise suppression circuit for suppressing above-ground noises

1. Technical Field A noise suppression circuit for suppressing above-ground noise is disclosed. The noise suppression circuit for suppressing noises includes a first inverter, a second inverter, and a one-shot circuit. The first inverter, connected to an input line, switches at a first voltage value...

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Hauptverfasser: Durham, Christopher McCall, Klim, Peter Juergen
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creator Durham, Christopher McCall
Klim, Peter Juergen
description 1. Technical Field A noise suppression circuit for suppressing above-ground noise is disclosed. The noise suppression circuit for suppressing noises includes a first inverter, a second inverter, and a one-shot circuit. The first inverter, connected to an input line, switches at a first voltage value above which a noise-coupling event is suspected. The second inverter, also connected to the input line, switches at a second voltage value above which a full-switch input is assumed. A first transistor is coupled to the input line. A second transistor passes an output of the second inverter to a gate of the first transistor when an output of the one-shot circuit is high. The third transistor holds the gate of the first transistor low when the output of the one-shot circuit is low.
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Technical Field A noise suppression circuit for suppressing above-ground noise is disclosed. The noise suppression circuit for suppressing noises includes a first inverter, a second inverter, and a one-shot circuit. The first inverter, connected to an input line, switches at a first voltage value above which a noise-coupling event is suspected. The second inverter, also connected to the input line, switches at a second voltage value above which a full-switch input is assumed. A first transistor is coupled to the input line. A second transistor passes an output of the second inverter to a gate of the first transistor when an output of the one-shot circuit is high. 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Technical Field A noise suppression circuit for suppressing above-ground noise is disclosed. The noise suppression circuit for suppressing noises includes a first inverter, a second inverter, and a one-shot circuit. The first inverter, connected to an input line, switches at a first voltage value above which a noise-coupling event is suspected. The second inverter, also connected to the input line, switches at a second voltage value above which a full-switch input is assumed. A first transistor is coupled to the input line. A second transistor passes an output of the second inverter to a gate of the first transistor when an output of the one-shot circuit is high. The third transistor holds the gate of the first transistor low when the output of the one-shot circuit is low.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2003</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZLD1y88sTlUoLi0oKEotLs7Mz1NIzixKLs0sUUjLL0KI56UrJCbll6Xqphfll-alKOSBtBXzMLCmJeYUp_JCaW4GBTfXEGcP3dLigsSS1LyS4vj0okQQZWBmam5uaGpkTIQSAFL-MfQ</recordid><startdate>20030610</startdate><enddate>20030610</enddate><creator>Durham, Christopher McCall</creator><creator>Klim, Peter Juergen</creator><scope>EFH</scope></search><sort><creationdate>20030610</creationdate><title>Noise suppression circuit for suppressing above-ground noises</title><author>Durham, Christopher McCall ; Klim, Peter Juergen</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_065771523</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2003</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Durham, Christopher McCall</creatorcontrib><creatorcontrib>Klim, Peter Juergen</creatorcontrib><creatorcontrib>International Business Machines Corporation</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Durham, Christopher McCall</au><au>Klim, Peter Juergen</au><aucorp>International Business Machines Corporation</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Noise suppression circuit for suppressing above-ground noises</title><date>2003-06-10</date><risdate>2003</risdate><abstract>1. Technical Field A noise suppression circuit for suppressing above-ground noise is disclosed. The noise suppression circuit for suppressing noises includes a first inverter, a second inverter, and a one-shot circuit. The first inverter, connected to an input line, switches at a first voltage value above which a noise-coupling event is suspected. The second inverter, also connected to the input line, switches at a second voltage value above which a full-switch input is assumed. A first transistor is coupled to the input line. A second transistor passes an output of the second inverter to a gate of the first transistor when an output of the one-shot circuit is high. The third transistor holds the gate of the first transistor low when the output of the one-shot circuit is low.</abstract><oa>free_for_read</oa></addata></record>
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title Noise suppression circuit for suppressing above-ground noises
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